Method, apparatus and system providing a storage gate pixel with high dynamic range

Patent metadata

Field	Value
Publication number	US-9412779-B2
Application number	US-201314089225-A
Country	US
Kind code	B2
Filing date	Nov 25, 2013
Priority date	Aug 29, 2006
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

A method, apparatus and system are described providing a high dynamic range pixel. An integration period has multiple sub-integration periods during which charges are accumulated in a photosensor and repeatedly transferred to a storage node, where the charges are accumulated for later transfer to another storage node for output.

First claim

What is claimed as new and desired to be protected by Letters Patent of the United States is:

1. An imaging system comprising an array of pixels, each of the pixels comprising:
a photosensor device for generating charges;
a first transistor connected to the photosensor for transferring charge from the photosensor;
a storage node selectively coupled to the photosensor, wherein the storage node is configured to store a sum charge transferred from the photosensor via the first transistor and accumulated over separate integration periods each having a different duration; and
a second transistor connected to the storage node for transferring the sum charge from the storage node to a floating diffusion node, wherein the charge storage capacity of the storage node is greater than the charge storage capacity of the photosensor.

2. The imaging system of claim 1 , wherein the charge storage capacity of the storage node is at least twice the charge storage capacity of the photo-conversion device.

3. The imaging system of claim 1 , further comprising a control circuit for operating the first transistor, wherein the control circuit is configured to define a duration of each of the separate integration periods for an image capture.

4. The imaging system of claim 1 , wherein each pixel further comprises a readout circuit connected to the floating diffusion node to output a signal based on the sum charge transferred to the floating diffusion node.

5. The imaging system of claim 4 , wherein the readout circuit further comprises: a reset transistor connected to the floating diffusion node for resetting the charge on the floating diffusion node; a source-follower transistor having a gate for receiving charge from the floating diffusion node; and a row-select transistor connected to the source-follower transistor for outputting a signal produced by the source-follower transistor.

6. The imaging system of claim 1 , wherein each pixel further comprises an anti-blooming transistor electrically connected to the photosensor for draining charge from the photosensor, wherein the control circuit includes a gate configured to receive a constant voltage during one the separate integration periods that is the same as a constant voltage received at the gate during another one of the separate integration periods.

7. The imaging system of claim 5 , wherein the system is part of a camera.

8. An imager circuit comprising:
at least one pixel circuit comprising:
a photosensor,
a charge storage node configured to be coupled to the photosensor, the charge storage node having a charge storage capacity greater than the storage capacity of the photosensor, wherein the charge storage node is configured to successively store charge over multiple charge transfers of differing duration from the photosensor during a single integration period;
a first transistor configured to couple the photosensor to the charge storage node;
a floating diffusion region configured to be coupled to the charge storage node; and
a second transistor configured to couple the floating diffusion region to the charge storage node.

9. The imager circuit of claim 8 , wherein the charge storage capacity of the charge storage node is at least twice the charge storage capacity of the photosensor.

10. The imager circuit of claim 8 , further comprising a control circuit configured to:
at the conclusion of a first period of time, control the first transistor to transfer a first amount of charge accumulated in the photosensor during the first period of time to the charge storage node;
at the conclusion of at least one other period of time, control the first transistor to transfer at least one other amount of charge accumulated in the photosensor during the at least one other period of time to the charge storage node; and
control the second transistor to transfer the first amount of charge and the at least one other amount of charge accumulated in the charge storage to the floating diffusion region during a single charge transfer operation.

11. A pixel array comprising a plurality of pixels, at least one of the pixels comprising:
a photosensor for generating charges;
a charge storage node configured to be coupled to the photosensor, the charge storage node having a charge storage capacity greater than the storage capacity of the photosensor, wherein the charge storage node is configured to store a sum charge transferred from the photosensor over separate integration periods each having a different duration;
a first transistor configured to couple the photosensor to the charge storage node;
a floating diffusion region configured to be coupled to the charge storage node; and
a second transistor configured to couple the floating diffusion region to the charge storage node.

12. The pixel array of claim 11 , wherein the charge storage capacity of the charge storage node is at least twice the charge storage capacity of the photosensor.

13. A pixel array comprising a plurality of pixels, at least one of the pixels comprising:
a photosensor,
a charge storage node configured to be coupled to the photosensor, the charge storage node having a charge storage capacity sufficient to store multiple charge transfers from the photosensor of differing duration during a single integration period;
a first transistor configured to couple the photosensor to the charge storage node;
a floating diffusion region configured to be coupled to the charge storage node; and
a second transistor configured to couple the floating diffusion region to the charge storage node.

14. The pixel array of claim 13 , wherein the charge storage capacity of the charge storage node is greater than the charge storage capacity of the photosensor.

15. The pixel array of claim 13 , wherein the charge storage capacity of the charge storage node is at least twice the charge storage capacity of the photosensor.

Assignees

• Micron Technology Inc

Inventors

• Altice Parker

Classifications

• H04N25/771

  comprising storage means other than floating diffusion · CPC title

• H04N25/59 Primary

  by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title

• H04N25/575

  with a response composed of multiple slopes · CPC title

• H04N25/622

  by controlling anti-blooming drains · CPC title

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title