Performing arithmetic operations using both large and small floating point values

US8984041B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8984041-B2
Application numberUS-201213598847-A
CountryUS
Kind codeB2
Filing dateAug 30, 2012
Priority dateDec 13, 2011
Publication dateMar 17, 2015
Grant dateMar 17, 2015

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Abstract

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Mechanisms are provided for performing a floating point arithmetic operation in a data processing system. A plurality of floating point operands of the floating point arithmetic operation are received and bits in a mantissa of at least one floating point operand of the plurality of floating point operands are shifted. One or more bits of the mantissa that are shifted outside a range of bits of the mantissa of at least one floating point operand are stored and a vector value is generated based on the stored one or more bits of the mantissa that are shifted outside of the range of bits of the mantissa of the at least one floating point operand. A resultant value is generated for the floating point arithmetic operation based on the vector value and the plurality of floating point operands.

First claim

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What is claimed is: 1. A method, in a data processing system, for performing a floating point arithmetic operation, comprising: receiving, in hardware logic of the data processing system, a plurality of floating point operands of the floating point arithmetic operation; shifting, by the hardware logic, bits in a mantissa of at least one floating point operand of the plurality of floating point operands; storing, by the hardware logic, one or more bits of the mantissa that are…

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What does patent US8984041B2 cover?
Mechanisms are provided for performing a floating point arithmetic operation in a data processing system. A plurality of floating point operands of the floating point arithmetic operation are received and bits in a mantissa of at least one floating point operand of the plurality of floating point operands are shifted. One or more bits of the mantissa that are shifted outside a range of bits of …
Who is the assignee on this patent?
Carter John B, Mealey Bruce G, Rajamani Karthick, and 3 more
What technology area does this patent fall under?
Primary CPC classification G06F7/483. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).