Outer product-based matrix-vector multiplication operation apparatus for accelerating vector operation and method using the same
US-2024362297-A1 · Oct 31, 2024 · US
US8984041B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8984041-B2 |
| Application number | US-201213598847-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 30, 2012 |
| Priority date | Dec 13, 2011 |
| Publication date | Mar 17, 2015 |
| Grant date | Mar 17, 2015 |
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Mechanisms are provided for performing a floating point arithmetic operation in a data processing system. A plurality of floating point operands of the floating point arithmetic operation are received and bits in a mantissa of at least one floating point operand of the plurality of floating point operands are shifted. One or more bits of the mantissa that are shifted outside a range of bits of the mantissa of at least one floating point operand are stored and a vector value is generated based on the stored one or more bits of the mantissa that are shifted outside of the range of bits of the mantissa of the at least one floating point operand. A resultant value is generated for the floating point arithmetic operation based on the vector value and the plurality of floating point operands.
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What is claimed is: 1. A method, in a data processing system, for performing a floating point arithmetic operation, comprising: receiving, in hardware logic of the data processing system, a plurality of floating point operands of the floating point arithmetic operation; shifting, by the hardware logic, bits in a mantissa of at least one floating point operand of the plurality of floating point operands; storing, by the hardware logic, one or more bits of the mantissa that are…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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