High-speed multi-port memory supporting collision
US-2024221828-A1 · Jul 4, 2024 · US
US8976576B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8976576-B2 |
| Application number | US-201314057294-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 18, 2013 |
| Priority date | May 21, 2013 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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A static random access memory structure is provided. The static random access memory structure includes a storage region having a first storage node and a second storage node which is complementary to the first storage node. The static random access memory structure also includes a reading region having a first reading transfer gate and a second reading transfer gate, and a reading word line electrically connecting with the gate of the first reading transfer gate and the gate of the second reading transfer gate. Further, the static random access memory structure includes a writing region independent of the reading region having a first writing transfer gate and a second writing transfer gate and a writing word line electrically connecting with the gate of the first writing transfer gate and the gate of the second transfer gate.
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What is claimed is: 1. A static random access memory structure, comprising: a storage region having a first storage node and a second storage node which is complementary to the first storage region; a reading region having a first reading transfer gate and a second reading transfer gate; and a writing region having a first writing transfer gate and a second writing transfer gate, wherein: a gate of the first reading transfer gate and a gate of the second reading transfer ga…
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