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US-2024332075-A1 · Oct 3, 2024 · US
Method of making a semiconductor device including barrier layers for copper interconnect
US8975749B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975749-B2 |
| Application number | US-201414151857-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 10, 2014 |
| Priority date | Jul 8, 2009 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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Abstract
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A method of making a semiconductor device includes forming a dielectric layer over a semiconductor substrate. The method further includes forming a copper-containing layer in the dielectric layer, wherein the copper-containing layer has a first portion and a second portion. The method further includes forming a first barrier layer between the first portion of the copper-containing layer and the dielectric layer. The method further includes forming a second barrier layer at a boundary between the second portion of the copper-containing layer and the dielectric layer wherein the second barrier layer is adjacent to an exposed portion of the dielectric layer. The first barrier layer is a dielectric layer, and the second barrier layer is a metal oxide layer, and a boundary between a sidewall of the copper-containing layer and the first barrier layer is free of the second barrier layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of making a semiconductor device, the method comprising: forming a dielectric layer over a semiconductor substrate; forming a copper-containing layer in the dielectric layer, wherein the copper-containing layer has a first portion and a second portion; forming a first barrier layer between the first portion of the copper-containing layer and the dielectric layer; and forming a second barrier layer at a boundary between the second portion of th…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8975749B2 cover?
- A method of making a semiconductor device includes forming a dielectric layer over a semiconductor substrate. The method further includes forming a copper-containing layer in the dielectric layer, wherein the copper-containing layer has a first portion and a second portion. The method further includes forming a first barrier layer between the first portion of the copper-containing layer and the…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification H10W20/035. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).