Semiconductor die, semiconductor package and substrate dicing method
US-2024421000-A1 · Dec 19, 2024 · US
Wafer dicing from wafer backside
US8975162B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975162-B2 |
| Application number | US-201314095824-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 3, 2013 |
| Priority date | Dec 20, 2012 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternatively, if no die attach film is initially disposed between the wafer backside and the dicing tape, a die attach film is applied to the wafer backside at this operation. A water soluble mask is applied to the wafer backside. Laser scribing is performed on the wafer backside to cut through the mask, the die attach film and the wafer, including all layers included within the front side and backside of the wafer. A plasma etch is performed to treat or clean surfaces of the wafer exposed by the laser scribing. A wafer backside cleaning is performed and a second dicing tape is applied to the wafer backside. The protection tape is the removed from the wafer front side.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of dicing a semiconductor wafer comprising a plurality of integrated circuits, the method comprising: applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside; removing the dicing tape from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape; and, subsequently, applying a mask to the wafer backside; and, subsequently, laser scribing from t…
Assignees
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Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10P54/00Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8975162B2 cover?
- Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternat…
- Who is the assignee on this patent?
- Applied Materials Inc
- What technology area does this patent fall under?
- Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).