Manufacturing a super junction semiconductor device

Patent metadata

Field	Value
Publication number	US-8975136-B2
Application number	US-201313769619-A
Country	US
Kind code	B2
Filing date	Feb 18, 2013
Priority date	Feb 18, 2013
Publication date	Mar 10, 2015
Grant date	Mar 10, 2015

Abstract

A super junction semiconductor device includes a semiconductor portion with a first surface and a parallel second surface. A doped layer of a first conductivity type is formed at least in a cell area. Columnar first super junction regions of a second, opposite conductivity type extend in a direction perpendicular to the first surface. Columnar second super junction regions of the first conductivity type separate the first super junction regions from each other. The first and second super junction regions form a super junction structure between the first surface and the doped layer. A distance between the first super junction regions and the second surface does not exceed 30 μm. The on-state or forward resistance of low-voltage devices rated for reverse breakdown voltages below 1000 V can be defined by the resistance of the super junction structure.

First claim

What is claimed is:

1. A method of manufacturing a super junction semiconductor device, the method comprising:
forming columnar first and second super junction regions of opposite conductivity types in a semiconductor substrate with a process surface, the first and second super junction regions extending in a direction perpendicular to the process surface and forming a super junction structure;
thinning the semiconductor substrate from the process surface to obtain, from the sem…

Assignees

• Infineon Technologies Austria

Inventors

• Willmeroth Armin
• Hirler Franz
• Schulze Hans-Joachim
• Wahl Uwe
• Kaindl Winfried

Classifications

• H10P52/00

  Electricity · mapped topic

• H10P50/642

  Electricity · mapped topic

• H10P95/405 Primary

  Electricity · mapped topic

• H10D62/822

  Electricity · mapped topic

• H10D62/157

  Electricity · mapped topic