Replacement of a faulty memory cell with a spare cell for a memory circuit

Patent metadata

Field	Value
Publication number	US-8971094-B2
Application number	US-201313782348-A
Country	US
Kind code	B2
Filing date	Mar 1, 2013
Priority date	Sep 16, 2011
Publication date	Mar 3, 2015
Grant date	Mar 3, 2015

Abstract

A memory interface device has an address input(s) configured to receive address information from an address stream of a host controller; an address output(s) configured to drive address information, and is coupled to a plurality of memory devices; an address match table comprising at least a revised address corresponding to a spare memory location; a control module configured to determine address information from an address stream from an address command bus coupled to a host controller during a run time operation; and a multiplexer coupled to the address input and coupled to the address output.

First claim

The invention claimed is:

1. A memory interface device, the device comprising:
an address input(s) configured to receive address information from an address stream of a host controller;
an address output(s) configured to drive address information, the address output(s) being coupled to a plurality of memory devices wherein the plurality of memory devices comprise a plurality of DRAM devices;
an address match table comprising at least a revised address corresponding to a spare…

Assignees

• Inphi Corp

Inventors

• Wang David T

Classifications

• G11C29/808 Primary

  Physics · mapped topic

• G11C11/408

  Physics · mapped topic

• G11C29/846

  Physics · mapped topic

• G11C29/04 Primary

  Physics · mapped topic

• G11C11/24

  Physics · mapped topic