Transistor voltage threshold mismatch compensated sense amplifiers and methods for precharging sense amplifiers
US-9190126-B2 · Nov 17, 2015 · US
Memory circuit with transistors having different threshold voltages and method of operating the memory circuit
US8964485B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8964485-B2 |
| Application number | US-201213681030-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 19, 2012 |
| Priority date | Nov 19, 2012 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Abstract
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A memory circuit includes a memory cell, a data line coupled to the memory cell, a sense amplifier having an input terminal, a precharge circuit coupled to the input terminal of the sense amplifier, a first transistor of a first type, and a second transistor of the first type. The first transistor is coupled between the input terminal of the sense amplifier and the data line, and the second transistor is coupled between to the input terminal of the sense amplifier and the data line. The first transistor has a first threshold voltage, and the second transistor has a second threshold voltage lower than the first threshold voltage.
First claim
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What is claimed is: 1. A memory circuit comprising: a memory cell; a data line coupled to the memory cell; a sense amplifier having an input terminal; a precharge circuit coupled to the input terminal of the sense amplifier; a first transistor of a first type having a drain coupled to the input terminal of the sense amplifier and a source coupled to the data line, the first transistor having a first threshold voltage; and a second transistor of the first type having a dr…
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Frequently asked questions
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- What does patent US8964485B2 cover?
- A memory circuit includes a memory cell, a data line coupled to the memory cell, a sense amplifier having an input terminal, a precharge circuit coupled to the input terminal of the sense amplifier, a first transistor of a first type, and a second transistor of the first type. The first transistor is coupled between the input terminal of the sense amplifier and the data line, and the second tra…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification G11C7/06. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).