No flow underfill or wafer level underfill and solder columns

US8963340B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8963340-B2
Application numberUS-201113231594-A
CountryUS
Kind codeB2
Filing dateSep 13, 2011
Priority dateSep 13, 2011
Publication dateFeb 24, 2015
Grant dateFeb 24, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A preassembly semiconductor device comprises substrate soldering structures extending toward chip soldering structures for forming solder connections with the chip soldering structures, i.e., the chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied underfill is contiguous with the substrate and is sufficiently thick so as to extend substantially no further than the full height of the substrate soldering structures. In another embodiment the height of the chip soldering structures is greater than the height of the substrate soldering structures and the pre-applied underfill is contiguous with the semiconductor chip and sufficiently thick so as to extend substantially no further than the full height of the chip soldering structures. A process comprises manufacturing semiconductor assemblies from these devices by soldering the semiconductor chip and the substrate to one another.

First claim

Opening claim text (preview).

We claim: 1. A preassembly semiconductor device comprising; a) a semiconductor chip comprising chip soldering structures C4 connectors; b) a substrate comprising substrate soldering structures that correspond to and extend toward said chip soldering structures for forming solder connections with said chip soldering structures, the height of said substrate soldering structures being greater than the height of said chip soldering structures; c) said chip and said substrate being…

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What does patent US8963340B2 cover?
A preassembly semiconductor device comprises substrate soldering structures extending toward chip soldering structures for forming solder connections with the chip soldering structures, i.e., the chip and the substrate are in preassembly positions relative to one another. The height of the substrate soldering structures is greater than the height of the chip soldering structures. A pre-applied …
Who is the assignee on this patent?
Feger Claudius, Gaynes Michael A, Nah Jae-Woong, and 2 more
What technology area does this patent fall under?
Primary CPC classification H10W74/012. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).