Epitaxial structure for vertically integrated charge transfer gate technology in optoelectronic materials

US8963274B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8963274-B2
Application numberUS-201313832450-A
CountryUS
Kind codeB2
Filing dateMar 15, 2013
Priority dateMar 15, 2013
Publication dateFeb 24, 2015
Grant dateFeb 24, 2015

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  1. Title

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A low noise infrared photo detector with a vertically integrated field effect transistor (FET) structure is formed without thermal diffusion. The FET structure includes a high sensitivity photo detector layer, a charge well layer, a transfer well layer, a charge transfer gate, and a drain electrode. In an embodiment, the photo detector layer and charge well are InGaAs and the other layers are InP layers.

First claim

Opening claim text (preview).

The invention claimed is: 1. A vertically integrated epitaxial field effect transistor structure, comprising: a high sensitivity photo detector layer; a charge well; a transfer well; a charge transfer gate electrode; and a drain electrode. 2. The photo detector of claim 1 , wherein the photo detector layer and charge well are buried between carrier migration barrier layers. 3. The photo detector of claim 2 , wherein the photo detector layer is InGaAs, or a member of the InAlGaAsP material system traditionally grown on InP substrates. 4. The photo detector of claim 3 , wherein the photo detector layer is InGaAs. 5. The photo detector of claim 2 , wherein the carrier migration barrier layers are selected from the group consisting of InP, InAlAs, and InAlGaAsP layers. 6. The photo detector of claim 5 , wherein the carrier migration barrier layers are InP. 7. The photo detector of claim 2 , wherein the carrier migration barrier layers comprise hetero structure layers in the InAlGaAsP material system with a concentration gradient comprising a stepped or continuous change in concentration across the layers. 8. The photo detector of claim 1 , wherein the charge well is InGaAs or a member of the InAlGaAsP material system traditionally grown on InP substrates. 9. The photo detector of claim 7 , wherein the heterostructure layers comprise binary, ternary or quaternary compositions of the InAlGaAsP material system. 10. The photo detector of claim 1 , wherein the charge transfer gate electrode and drain electrode comprise Ti, Pt, Au, Ni, Cu, or combinations thereof. 11. The photo detector of claim 1 , wherein the photo detector layer is responsive to a signal with a wavelength in the range of 0.4 to 1.7 micrometers. 12. The photo detector of claim 1 , wherein the charge transfer gate electrode is triggered by an external circuit that controls the collection of photo current. 13. A low noise infrared focal plane detector array that includes a plurality of vertically integrated epitaxial field effect transistor structures, wherein each vertically integrated epitaxial field effect transistor structure comprises: a high sensitivity photo detector layer; a charge well; a transfer well; a charge transfer gate electrode; and a drain electrode. 14. The detector array of claim 13 , wherein the photo detector layer and charge well are buried between carrier migration barrier layers. 15. The detector array of claim 13 , wherein the photo detector layer is InGaAs or a member of the InAlGaAsP material system traditionally grown on InP substrates. 16. The detector array of claim 13 , wherein the charge well is InGaAs or a member of the InAlGaAsP material system traditionally grown on InP substrates. 17. The detector array of claim 13 , wherein the charge transfer gate electrode and drain electrode comprise Ti, Pt, Au, Ni, Cu, or combinations thereof. 18. A near IR camera system , comprising: a focal plane detector array that includes a plurality of low noise IR photo detector elements, wherein each low noise IR photo detector element is formed without thermal diffusion processes and includes a vertically integrated epitaxial field effect transistor structure, the vertically integrated epitaxial field effect transistor structure comprising: a high sensitivity photo detector layer; a charge well; a transfer well; a charge transfer gate electrode; and a drain electrode. 19. The near IR camera system of claim 18 , wherein the photo detector layer and charge well are buried between carrier migration barrier layers. 20. A low noise infrared photo detector, formed without thermal diffusion processes, that includes the vertically integrated epitaxial field effect transistor structure of claim 1 .

Assignees

Inventors

Classifications

  • Junction field effect transistor [JFET] image sensors; Static induction transistor [SIT] image sensors · CPC title

  • H10F30/287Primary

    the devices having PN heterojunction gates · CPC title

  • Electricity · mapped topic

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What does patent US8963274B2 cover?
A low noise infrared photo detector with a vertically integrated field effect transistor (FET) structure is formed without thermal diffusion. The FET structure includes a high sensitivity photo detector layer, a charge well layer, a transfer well layer, a charge transfer gate, and a drain electrode. In an embodiment, the photo detector layer and charge well are InGaAs and the other layers are I…
Who is the assignee on this patent?
Sensors Unlimited Inc
What technology area does this patent fall under?
Primary CPC classification H10F30/287. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).