Transistor, semiconductor device, and semiconductor structure
US-2024379874-A1 · Nov 14, 2024 · US
Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof
US8963208B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963208-B2 |
| Application number | US-201213678054-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 15, 2012 |
| Priority date | Nov 15, 2012 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
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Abstract
Official abstract text for this publication.
A structure comprises a semiconductor substrate, a semiconductor-on-insulator region and a bulk region. The semiconductor-on-insulator region comprises a first semiconductor region, a dielectric layer provided between the semiconductor substrate and the first semiconductor region, and a first transistor comprising an active region provided in the first semiconductor region. The dielectric layer provides electrical isolation between the first semiconductor region and the semiconductor substrate. The bulk region comprises a second semiconductor region provided directly on the semiconductor substrate.
First claim
Opening claim text (preview).
What is claimed: 1. A method, comprising: providing a structure comprising a semiconductor substrate, a semiconductor layer provided above said semiconductor substrate and a dielectric layer provided between said semiconductor substrate and said semiconductor layer; forming a trench isolation region, providing electrical isolation between a portion of said semiconductor layer in a second part of said structure and a first part of said structure, before said portions of said semi…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8963208B2 cover?
- A structure comprises a semiconductor substrate, a semiconductor-on-insulator region and a bulk region. The semiconductor-on-insulator region comprises a first semiconductor region, a dielectric layer provided between the semiconductor substrate and the first semiconductor region, and a first transistor comprising an active region provided in the first semiconductor region. The dielectric layer…
- Who is the assignee on this patent?
- Globalfoundries Inc, Globalfoundries Inc
- What technology area does this patent fall under?
- Primary CPC classification H10D86/01. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).