Transistor contacts and methods of forming the same
US-2024395871-A1 · Nov 28, 2024 · US
Method for fabricating a semiconductor device
US8963205B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8963205-B2 |
| Application number | US-16516408-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 30, 2008 |
| Priority date | Nov 9, 2007 |
| Publication date | Feb 24, 2015 |
| Grant date | Feb 24, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A transistor of a semiconductor device includes a substrate, a gate over the substrate, a source/drain region formed in the substrate to have a channel region therebetween, and an epitaxial layer formed below the channel region to have a different lattice constant from the substrate. The epitaxial layer having a different lattice constant with a substrate material is formed below the channel region to apply a stress to the channel region. Thus, the mobility of carriers of the transistor increases.
First claim
Opening claim text (preview).
What is claimed is: 1. A transistor of a semiconductor device, comprising: a silicon (Si) substrate, the substrate having a lattice constant; an epitaxial substrate formed over and in contact with the Si substrate; a gate formed over the epitaxial substrate; source/drain regions formed in the epitaxial substrate, wherein a channel region is formed in the epitaxial substrate between the source/drain regions; and an epitaxial layer formed in the Si substrate below the channe…
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10D30/751Primary
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US8963205B2 cover?
- A transistor of a semiconductor device includes a substrate, a gate over the substrate, a source/drain region formed in the substrate to have a channel region therebetween, and an epitaxial layer formed below the channel region to have a different lattice constant from the substrate. The epitaxial layer having a different lattice constant with a substrate material is formed below the channel re…
- Who is the assignee on this patent?
- Kim Yong-Soo, Kim Jun-Ki, Jang Se-Aug, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10D30/751. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).