Simultaneous transmission of clock and bidirectional data over a communication channel

Patent metadata

Field	Value
Publication number	US-8958497-B2
Application number	US-201313834927-A
Country	US
Kind code	B2
Filing date	Mar 15, 2013
Priority date	Jun 12, 2012
Publication date	Feb 17, 2015
Grant date	Feb 17, 2015

Abstract

Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.

First claim

What is claimed is:

1. A transmitting device comprising:
a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal;
a driver to drive the modulated signal on a communication channel;
an echo canceller to subtract reflected signals on the communication channel; and
a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.

2. The transmitting device of claim 1 , wherein the communication channel is a single wire channel.

3. The transmitting device of claim 1 , wherein the communication channel is a differential pair channel.

4. The transmitting device of claim 1 , wherein the modulation of the data signal includes a first value being encoded by a signal edge at a first position and a second value being encoded by a signal edge at a second position, wherein the second position is a later signal edge position than the first position.

5. The transmitting device of claim 1 , further comprising a phase locked loop circuit to control a timing relationship with a receiving device.

6. A method comprising:
transmitting a clock signal and a first set of data on a communication channel, including:
modulating the clock signal and the first set of data together, wherein the modulation includes setting a first signal edge as the clock signal and positioning a second signal edge to encode a data value of the data stream, and
driving the modulated signal on a communication channel and providing the modulated signal for echo cancellation; and

receiving a second set of data on the same communication channel, including;
receiving signals on the communication channel,
cancelling signal echo on the communication using the modulated signal, and
detecting the second set of data in the received signals, where the second set of signals is encoded with Return-to-Zero encoding;

wherein the transmission of the clock signal and the first set of data occurs simultaneously with the reception of the second set of data.

7. The method of claim 6 , wherein the modulation of the first set of data includes a first value being encoded by a signal edge at a first position and a second value being encoded by a signal edge at a second position, wherein the second position is a later signal edge position than the first position.

Assignees

• Silicon Image Inc

Inventors

• Lee Inyeol
• Sung Baegin
• Sohn Hanwoong
• Tahk Shinje
• Baek Sun Woo
• Harrell Chandlee B

Classifications

• H04B7/015 Primary

  Reducing echo effects · CPC title

• H04L25/4904

  using self-synchronising codes, e.g. split-phase codes · CPC title

• H04B3/23 Primary

  using a replica of transmitted signal in the time domain, e.g. echo cancellers · CPC title

• H04L7/0087 Primary

  Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection · CPC title

• H04L7/042

  Detectors therefor, e.g. correlators, state machines (digital correlators in general G06F17/15) · CPC title