Semiconductor device

Patent metadata

Field	Value
Publication number	US-8958263-B2
Application number	US-201213479437-A
Country	US
Kind code	B2
Filing date	May 24, 2012
Priority date	Jun 10, 2011
Publication date	Feb 17, 2015
Grant date	Feb 17, 2015

Abstract

An object is to increase the retention characteristics of a memory device formed using a wide bandgap semiconductor. A bit line controlling transistor is inserted in a bit line in series. The minimum potential of a gate of the transistor is set to a sufficiently negative value. The gate of the transistor is connected to a bit line controlling circuit connected to a battery. The minimum potential of the bit line is set higher than that of a word line. When power from an external power supply is interrupted, the bit line is cut off by the transistor, ensuring prevention of outflow of charge in the bit line. The potential of a source or a drain (bit line) of a cell transistor is sufficiently higher than that of a gate of the cell transistor, resulting in an absolute off-state; thus, data can be retained. Other embodiments are disclosed.

First claim

What is claimed is:

1. A semiconductor device comprising:
a column driver;
a bit line;
a word line;
a memory cell;
a bit line controlling transistor; and
a bit line controlling circuit,
wherein the memory cell includes a transistor and a capacitor,
wherein a source of the transistor is connected to the bit line,
wherein a drain of the transistor is connected to one electrode of the capacitor,
wherein a gate of the transistor is connected to the word line,
where…

Assignees

• Takemura Yasuhiko
• Semiconductor Energy Lab

Inventors

• Takemura Yasuhiko

Classifications

• G11C11/403 Primary

  Physics · mapped topic

• G11C14/0009

  Physics · mapped topic

• G11C11/4074 Primary

  Physics · mapped topic

• G11C16/0433

  Physics · mapped topic

• H10D86/481

  Electricity · mapped topic