Germanium FinFETs having dielectric punch-through stoppers

US8957477B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8957477-B2
Application numberUS-201113272994-A
CountryUS
Kind codeB2
Filing dateOct 13, 2011
Priority dateMay 6, 2008
Publication dateFeb 17, 2015
Grant dateFeb 17, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of forming a semiconductor structure includes providing a composite substrate, which includes a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate. A first condensation is performed to the SiGe layer to form a condensed SiGe layer, so that the condensed SiGe layer has a substantially uniform germanium concentration. The condensed SiGe layer and a top portion of the bulk silicon substrate are etched to form a composite fin including a silicon fin and a condensed SiGe fin over the silicon fin. The method further includes oxidizing a portion of the silicon fin; and performing a second condensation to the condensed SiGe fin.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor structure comprising: a semiconductor substrate; a germanium fin over the semiconductor substrate; and an insulator having at least a portion underlying and adjoining the germanium fin, wherein the insulator comprises: a first portion overlapped by and adjoining the germanium fin, the first portion having a first bottom surface; and a second portion adjoining the first portion, wherein a vertical center of the second portion is offset…

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What does patent US8957477B2 cover?
A method of forming a semiconductor structure includes providing a composite substrate, which includes a bulk silicon substrate and a silicon germanium (SiGe) layer over and adjoining the bulk silicon substrate. A first condensation is performed to the SiGe layer to form a condensed SiGe layer, so that the condensed SiGe layer has a substantially uniform germanium concentration. The condensed S…
Who is the assignee on this patent?
Chang Cheng-Hung, Hsu Yu-Rung, Lee Chen-Yi, and 4 more
What technology area does this patent fall under?
Primary CPC classification H10D30/024. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 17 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).