Semiconductor device

Patent metadata

Field	Value
Publication number	US-8957466-B2
Application number	US-201113094142-A
Country	US
Kind code	B2
Filing date	Apr 26, 2011
Priority date	Apr 28, 2010
Publication date	Feb 17, 2015
Grant date	Feb 17, 2015

Abstract

A semiconductor device may include, but is not limited to: a semiconductor substrate; a memory capacitor; and a first compensation capacitor. The semiconductor substrate has at least first and second regions. The memory capacitor is positioned over the first region. The memory capacitor may include, but is not limited to: a first lower electrode; and a first dielectric film covering inner and outer surfaces of the first lower electrode. The first compensation capacitor is positioned over the second region. The first compensation capacitor includes, but is not limited to: a second lower electrode; a second dielectric film covering an inner surface of the second lower electrode; and a first insulating film covering an outer surface of the second lower electrode.

First claim

What is claimed is:

1. A semiconductor device comprising:
a semiconductor substrate having at least first and second regions;
a memory capacitor over the first region, the memory capacitor comprising:
a first lower electrode, the first lower electrode being a cup-shaped electrode;
a first dielectric film covering the first lower electrode;
a first upper electrode covering the first dielectric film; and

a first compensation capacitor over the second region, the first compensation capacitor comprising:
a second lower electrode, the second lower electrode being a cup-shaped electrode;
a second dielectric film covering the second lower electrode; and
a second upper electrode covering the second dielectric film,

wherein an inside of the cup-shaped electrode of the first compensation capacitor is filled with the second upper electrode,
wherein the second upper electrode is connected to a first wire via a first plug,
wherein a connected portion of the second upper electrode and the first plug is disposed higher than a highest portion of the second lower electrode, and
wherein a diameter of the first lower electrode is smaller than that of the second lower electrode.

2. The semiconductor device according to claim 1 , wherein
the first dielectric film covers inner and outer surfaces of the first lower electrode;
the second dielectric film covers an inner surface of the second lower electrode.

3. The semiconductor device according to claim 1 , further comprising:
a second compensation capacitor over the second region, the second compensation capacitor comprising:
a third lower electrode;
a third dielectric film covering the third lower electrode; and
a third upper electrode covering the third dielectric film,

wherein the second lower electrode is electrically connected to the third lower electrode by a first pad, and
wherein the second upper electrode and the third upper electrode are disposed separately from each other.

4. The semiconductor device according to claim 3 ,
wherein the second upper electrode is connected to a first wire that is supplied with a first voltage, and
wherein the third upper electrode is connected to a second wire that is supplied with a second voltage different from the first voltage.

5. The semiconductor device according to claim 3 ,
wherein the first compensation capacitor further comprises:
a fourth lower electrode; and
a fourth dielectric film covering the fourth lower electrode,

wherein the second compensation capacitor further comprises:
a fifth lower electrode; and
a fifth dielectric film covering the fourth lower electrode,

wherein the second upper electrode covers the fourth dielectric film and the third upper electrode covers the fifth dielectric film, and
wherein the second, third, fourth and fifth lower electrodes are electrically connected to the first pad.

6. The semiconductor device according to claim 5 , wherein the second, third, fourth and fifth lower electrodes extend vertically from the first pad.

7. The semiconductor device according to claim 5 , further comprising:
a first insulating film covering an each outer surface of the second, third, fourth and fifth lower electrodes.

8. The semiconductor device according to claim 3 , wherein the first upper electrode covers inner and outer surfaces of the first lower electrode.

9. The semiconductor device according to claim 3 ,
wherein the second upper electrode is connected to a first wire via a first plug, and
wherein the third upper electrode is connected to a second wire via a second plug.

10. The semiconductor device according to claim 3 , wherein the semiconductor substrate has a third region other than the first and second regions, and
wherein the semiconductor device further comprises:
a sixth lower electrode over the third region, the first dielectric film covering an inner surface of the sixth lower electrode, and the sixth lower electrode surrounding the first region in plan view.

11. The semiconductor device according to claim 3 , further comprising:
a gate electrode structure over the first region;
a second insulating film covering at least the gate electrode structure and the semiconductor substrate; and
a first impurity layer in the first region, the first impurity layer being positioned adjacent to an upper surface of the semiconductor substrate and the gate electrode structure,
wherein the memory capacitor is positioned over the second insulating film, and
the first lower electrode is electrically connected to the first impurity layer.

12. A semiconductor device comprising:
a memory capacitor disposed over a first region, the memory capacitor including a first lower electrode, a first dielectric film covering the first lower electrode, and a first upper electrode covering the first dielectric film; and
first and second compensation capacitors disposed over a second region, the first compensation capacitor including a second lower electrode, a second dielectric film covering the second lower electrode, and a second upper electrode covering the second dielectric film, the second compensation capacitor including a third lower electrode, and a third dielectric film covering the third lower electrode,
wherein the second upper electrode covers the third dielectric film,
wherein the second lower electrode is connected to a first pad,
wherein the third lower electrode is connected to a second pad,
wherein the first and the second pad are disposed separately from each other,
wherein an inside of the second lower electrode of the first compensation capacitor is filled with the second upper electrode,
wherein the second upper electrode is connected to a first wire via a first plug, and
wherein a connected portion of the second upper electrode and the first plug is disposed higher than a highest portion of the second lower electrode.

13. The semiconductor device according to claim 12 , wherein the first pad is connected to a first wire that is supplied with a first voltage, and
the second pad is connected to a second wire that is supplied with a second voltage different from the first voltage.

14. The semiconductor device according to claim 13 , wherein the first pad is connected to the first wire via a first plug, and
wherein the second pad is connected to the second wire via a second plug.

15. The semiconductor device according to claim 13 , wherein the first compensation capacitor further comprises:
a fourth lower electrode;
a fourth dielectric film covering the fourth lower electrode; and
a second upper electrode covering the fourth dielectric film,
wherein the second compensation capacitor further comprises:
a fifth lower electrode;
a fifth dielectric film covering the fifth lower electrode; and
a second upper electrode covering the fourth dielectric film;

wherein the second and fourth lower electrodes are connected to the first pad, and
wherein the third and fifth lower electrodes are connected to the second pad.

16. The semiconductor device according to claim 15 ,
wherein each of the first, second, and third lower electrodes has a cylindrical shape, and
wherein each diameter of the second and third lower electrodes is larger than a diameter of the first lower electrode.

17. A semiconductor device comprising:
a first wire supplied with a first power source;
a second wire supplied with a second power source different from the first power source;
a first compensation capacitor comprising:
a plurality of first electrodes disposed separately from one another,
a first di

Assignees

• Nakamura Yoshitaka
• Yamazaki Yasushi
• Ps4 Luxco Sarl

Inventors

• Nakamura Yoshitaka
• Yamazaki Yasushi

Classifications

• H10D1/716

  having vertical extensions · CPC title

• H10D1/042 Primary

  using deposition processes to form electrode extensions · CPC title

• H01L27/10817

  Electricity · mapped topic

• H01L27/10852

  Electricity · mapped topic

• H01L28/91

  Electricity · mapped topic