Calculation method for generating layout pattern in photomask

US8954919B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-8954919-B1
Application numberUS-201314069391-A
CountryUS
Kind codeB1
Filing dateNov 1, 2013
Priority dateNov 1, 2013
Publication dateFeb 10, 2015
Grant dateFeb 10, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A calculation method for generating a layout pattern in a photomask includes at least the following steps. A two-dimensional design layout including several geometric patterns distributed in a plane is provided to a computer system. The computer system is used to mark portions of the geometric patterns and generate at least one marked geometric pattern and at least one non-marked geometric pattern. The marked geometric pattern is then simulated and corrected by the computer system so as to generate a 3-D design layout. Through the simulation and correction, the marked geometric pattern and the non-marked geometric pattern are arranged alternately along an axis orthogonal to the plane. The 3-D design layout is outputted to a mask-making system afterwards.

First claim

Opening claim text (preview).

What is claimed is: 1. A calculation method for generating a layout pattern in a photomask, comprising: providing a computer system having a computer readable storage device; providing a two-dimensional (2-D) design layout to the computer system, wherein the 2-D design layout comprises a plurality of geometric patterns distributed in a plane; marking portions of the geometric patterns to generate at least one marked geometric pattern and at least one non-marked geometric pattern; moving the marked geometric pattern along an axis orthogonal to the plane so as to convert the 2-D design layout to a three-dimensional (3-D) design layout, wherein the marked geometric pattern and the non-marked geometric pattern of the 3-D design layout are arranged alternately along the axis orthogonal to the plane; and outputting the 3-D design layout to a mask-making system. 2. The method according to claim 1 , before providing the 2-D design layout, furthering comprising: providing a 3-D circuit design to another computer system; and translating the 3-D circuit design into the 2-D design layout. 3. The method according to claim 1 , during marking the portions of the geometric patterns, further comprising: considering a plurality of factors affecting dimensions and shapes of corresponding geometric patterns to be translated to a layer over a substrate; and marking the portions of the geometric patterns in terms of the factors. 4. The method according to claim 3 , wherein the factors comprise densities of patterns, shapes of patterns, film thickness uniformity, and substrate topography. 5. The method according to claim 1 , wherein each of the marked geometric patterns and the non-marked geometric patterns are further defined with bottom boundaries and top boundaries after calculating the marked geometric pattern. 6. The method according to claim 5 , wherein the bottom boundary of the marked geometric pattern is spaced apart from the top boundary of the non-marked geometric pattern along the axis after calculating the marked geometric pattern. 7. The method according to claim 5 , wherein the bottom boundary of the marked geometric pattern is aligned with the top boundary of the non-marked geometric pattern along the axis after calculating the marked geometric pattern. 8. The method according to claim 1 , wherein at least two of the marked geometric patterns have an equal axis value after calculating the marked geometric pattern. 9. The method according to claim 1 , wherein at least two of the non-marked geometric patterns have an equal axis value after calculating the marked geometric pattern. 10. The method according to claim 1 , wherein the non-marked geometric pattern and the marked geometric pattern respectively have a first axis value and a second axis value, and the first axis value and a second axis value are not equal. 11. The method according to claim 1 , wherein the marked geometric pattern is spaced apart from the non-marked geometric pattern. 12. The method according to claim 1 , wherein the 3-D design layout is distributed in a 3-D space. 13. The method according to claim 1 , wherein the mask-making system is a 3-D printing system. 14. The method according to claim 13 , wherein the first marked geometric pattern is spaced apart from the second marked geometric pattern after calculating the marked geometric pattern. 15. The method according to claim 1 , wherein the marked geometric patterns comprise at least one first marked geometric pattern and at least one second marked geometric pattern, and the first marked geometric pattern and the second marked geometric pattern are arranged alternately along the axis after calculating the marked geometric pattern. 16. The method according to claim 15 , wherein each of the marked geometric patterns and the non-marked geometric patterns are further defined with bottom boundaries and top boundaries after calculating the marked geometric pattern. 17. The method according to claim 16 , wherein the bottom of the first marked geometric pattern is spaced apart from the top of the second marked geometric pattern along the axis after calculating the marked geometric pattern. 18. The method according to claim 16 , wherein the bottom boundary of the first marked geometric pattern is aligned with the top boundary of the non-marked geometric pattern along the axis after calculating the marked geometric pattern. 19. A method for forming a pattern on a substrate, comprising fabricating a photomask including the 3-D design layout according to claim 1 . 20. The method according to claim 19 , further comprising transferring the 3-D design layout from the photomask into a layer on the substrate.

Assignees

Inventors

Classifications

  • G06F17/50Primary

    Physics · mapped topic

  • G03F1/70Primary

    Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging · CPC title

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What does patent US8954919B1 cover?
A calculation method for generating a layout pattern in a photomask includes at least the following steps. A two-dimensional design layout including several geometric patterns distributed in a plane is provided to a computer system. The computer system is used to mark portions of the geometric patterns and generate at least one marked geometric pattern and at least one non-marked geometric patt…
Who is the assignee on this patent?
United Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification G06F17/50. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).