Memory cell with decoupled read/write path

Patent metadata

Field	Value
Publication number	US-8953370-B2
Application number	US-201313773366-A
Country	US
Kind code	B2
Filing date	Feb 21, 2013
Priority date	Feb 21, 2013
Publication date	Feb 10, 2015
Grant date	Feb 10, 2015

Abstract

A memory cell with a decoupled read/write path includes a switch comprising a first terminal connected to a first line and a second terminal connected to a second line, a resistive switching device connected between a gate of the switch and a third line, and a conductive path between the gate of the switch and the second line.

First claim

What is claimed is:

1. A memory array comprising:
a number of bit lines;
a number of word lines;
a number of source lines; and
a number of memory cells, each memory cell comprising:
a switch comprising:
a gate;
a first terminal connected to a source line; and
a second terminal connected to a word line;

a resistive switching device connected between the gate of the switch and a bit line; and
a conductive path between the gate of the switch and the word line.…

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Ting Yu-Wei
• Huang Kuo-Ching
• Tsai Chun-Yang

Classifications

• G11C7/02 Primary

  Physics · mapped topic

• G11C13/0002

  Physics · mapped topic

• G11C5/06

  Physics · mapped topic

• G11C11/1673

  Physics · mapped topic

• G11C11/1675

  Physics · mapped topic