Back side signal routing in a circuit with a relay cell
US-2024379554-A1 · Nov 14, 2024 · US
US8947902B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8947902-B2 |
| Application number | US-201213412804-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 6, 2012 |
| Priority date | Mar 6, 2012 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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A semiconductor memory includes a first bit cell within an integrated circuit (IC), and a second bit cell within the same IC. The first bit cell has a first layout, and the second bit cell has a second layout that differs from the first layout.
Opening claim text (preview).
What is claimed is: 1. A semiconductor memory, comprising: a first bit cell of a first memory type within an integrated circuit (IC), the first bit cell of the first memory type having a first layout, the first layout including a first word line disposed in a first conductive layer and extending in a first direction, and, and a plurality of bit lines disposed in a second conductive layer and extending in a second direction; and a second bit cell of the first memory type wit…
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