Three dimensional FET devices having different device widths

Patent metadata

Field	Value
Publication number	US-8946010-B2
Application number	US-201414226746-A
Country	US
Kind code	B2
Filing date	Mar 26, 2014
Priority date	Jul 16, 2011
Publication date	Feb 3, 2015
Grant date	Feb 3, 2015

Abstract

A method of manufacturing a three dimensional FET device structure includes: providing a substrate having a semiconductor layer on an insulator layer; forming three dimensional fins in the semiconductor layer; applying a masking material to a first fin while exposing a second fin; applying a hydrogen atmosphere to the substrate and exposed second fin, the hydrogen atmosphere causing the exposed second fin to reflow and change shape; removing the masking material from the first fin; and forming a gate to wrap around each of the first and second fins. The first and second fins are formed having a device width such that the first fin having a first device width and a second fin having a second device width with the first device width being different than the second device width.

First claim

The invention claimed is:

1. A method of manufacturing a three dimensional FET device structure comprising:
providing a substrate having a semiconductor layer on an insulator layer;
forming a plurality of three dimensional fins in the semiconductor layer;
applying a masking material to a first fin while exposing a second fin;
applying a hydrogen atmosphere to the substrate and exposed second fin for a first predetermined time at a first predetermined temperature and pressure…

Assignees

• IBM

Inventors

• Cheng Kangguo
• Doris Bruce B
• Khakifirooz Ali
• Kerber Pranita

Classifications

• H10D64/011 Primary

  Electricity · mapped topic

• H10D30/024

  Electricity · mapped topic

• H10D30/6213

  Electricity · mapped topic

• H10D86/215

  Electricity · mapped topic

• H10D86/011 Primary

  Electricity · mapped topic