Integrated circuit package and method
US-11935804-B2 · Mar 19, 2024 · US
Copper interconnect structure and method for forming the same
US8941239B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8941239-B2 |
| Application number | US-201213586676-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 15, 2012 |
| Priority date | Apr 13, 2012 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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Abstract
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A copper interconnect structure in a semiconductor device including an opening formed in a dielectric layer of the semiconductor device, the opening having sidewalls and a bottom. A first barrier layer is conformally deposited on the sidewalls and the bottom of the opening. A first seed layer is conformally deposited on the first barrier layer. A second barrier layer is conformally deposited on the first seed layer. A second seed layer is conformally deposited on the second barrier layer and a conductive plug is deposited in the opening of the dielectric layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A copper interconnect structure in a semiconductor device, comprising: an opening formed in a dielectric layer of the semiconductor device, the opening having sidewalls and a bottom; a first barrier layer deposited on the sidewalls and the bottom of the opening; a first seed layer deposited on the first barrier layer within the opening; a second barrier layer deposited directly on and entirely covering the first seed layer within the opening; and a s…
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Electricity · mapped topic
Electricity · mapped topic
- H10W20/042Primary
Electricity · mapped topic
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- What does patent US8941239B2 cover?
- A copper interconnect structure in a semiconductor device including an opening formed in a dielectric layer of the semiconductor device, the opening having sidewalls and a bottom. A first barrier layer is conformally deposited on the sidewalls and the bottom of the opening. A first seed layer is conformally deposited on the first barrier layer. A second barrier layer is conformally deposited on…
- Who is the assignee on this patent?
- Yu Chen-Hua, Shue Shau-Lin, Lee Hsiang-Huan, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H10W20/042. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 27 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).