Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
US8940643B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8940643-B2 |
| Application number | US-201313971600-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 20, 2013 |
| Priority date | Feb 8, 2010 |
| Publication date | Jan 27, 2015 |
| Grant date | Jan 27, 2015 |
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A method of lithography patterning includes forming a first etch stop layer, a second etch stop layer, and a hard mask layer on a material layer. The materials of the first etch stop layer and the second etch stop layer are selected by the way that there is a material gradient composition between the second etch stop layer, the first etch stop layer, and the material layer. Hence, gradient etching rates between the second etch stop layer, the first etch stop layer, and the material layer are achieved in an etching process to form etched patterns with smooth and/or vertical sidewalls within the second and the first etch stop layers and the material layer.
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What is claimed is: 1. A method comprising: forming a material layer overlying a substrate, the material layer having a first silicon concentration; forming a first etch stop layer overlying the material layer, the first etch stop layer having a second silicon concentration; forming a second etch stop layer overlying the first etch stop layer, the second etch stop layer having a third silicon concentration, the second silicon concentration being less than the first silicon con…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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