Method for checking the integrity of a compute node
US-2024303346-A1 · Sep 12, 2024 · US
US8938646B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8938646-B2 |
| Application number | US-201213658838-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 24, 2012 |
| Priority date | Oct 24, 2012 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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A method, apparatus and product to be used in verification. The method comprising: based on a test generation input that defines a plurality of requirements automatically determining a mutated test generation input, wherein the mutated test generation input defining a mutated requirement which is absent from the test generation input, wherein the mutated requirement is based on a requirement of the plurality of requirements and contradicts, at least in part, the plurality of requirements; and generating one or more test-cases based on the mutated test generation input, whereby the one or more test-cases violate at least one requirement of the test generation input.
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What is claimed is: 1. A computer-implemented method performed by a processor, the method comprising: based on a test generation input that defines a plurality of requirements automatically determining a mutated test generation input, wherein the mutated test generation input defining a mutated requirement which is absent from the test generation input, wherein the mutated requirement is based on a requirement of the plurality of requirements and contradicts, at least in part, the…
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