Semiconductor device and method for forming a sram memory cell structure
US-2024179884-A1 · May 30, 2024 · US
Associative memory
US8937828B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937828-B2 |
| Application number | US-201213466381-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 8, 2012 |
| Priority date | Nov 7, 2011 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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Abstract
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An associative memory that can reduce search errors is provided. An associative memory includes R distance/time conversion circuits DT 1 to DT R . The R distance/time conversion circuits DT 1 to DT R each include a NAND circuit 40 and N bit stages 41 to 4 k. The N bit stages 41 to 4 k delay a signal from the NAND circuit 40 by longer delay time as the distance between reference data and search data is greater and oscillate the signal. Among R oscillation signals output from the distance/time conversion circuits DT 1 to DT R , the earliest changing oscillation signal is detected as an oscillation signal for the Winner row.
First claim
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The invention claimed is: 1. An associative memory, comprising: a reference data storage cell circuit that stores R reference data pieces each having a W bit length, R being an integer not less than 2, W being an integer not less than 2; a comparator circuit that compares search data to be searched for and having a W bit length to each of said R reference data pieces on a bit basis and outputs R distance signals each representing a distance between said search data and said refe…
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- G11C15/04Primary
Physics · mapped topic
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- What does patent US8937828B2 cover?
- An associative memory that can reduce search errors is provided. An associative memory includes R distance/time conversion circuits DT 1 to DT R . The R distance/time conversion circuits DT 1 to DT R each include a NAND circuit 40 and N bit stages 41 to 4 k. The N bit stages 41 to 4 k delay a signal from the NAND circuit 40 by longer delay time as the distance between reference dat…
- Who is the assignee on this patent?
- Mattausch Hans Juergen, Koide Tetsushi, Yasuda Masahiro, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification G11C15/04. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).