Semiconductor device manufacturing method and semiconductor device manufactured using the same
US-2024395745-A1 · Nov 28, 2024 · US
US8937672B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937672-B2 |
| Application number | US-201313934657-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 3, 2013 |
| Priority date | Jul 3, 2012 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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A solid-state image sensor including a wiring portion which includes a first line, a second line and a control line, in first to third regions arranged sequentially, wherein the first line includes a first pattern in a first layer in the first and second regions and a second pattern in a second layer in the third region, and these patterns are connected each other between the second region and the third region, the second line includes a third pattern in the second layer in the first region and a fourth pattern in the first layer in the second and third regions, the these patterns are connected each other between the first region and the second region, and the control line includes a pattern in the second layer in the second region, intersecting with the first pattern and the fourth pattern.
Opening claim text (preview).
What is claimed is: 1. A solid-state image sensor including a pixel array region in which a plurality of pixels are arranged to form a plurality of rows and columns, wherein in the pixel array region, a first column signal line and a second column signal line configured to transfer signals from corresponding pixels respectively, and a control line configured to control the corresponding pixels are arranged, a region in which the first column signal line, the second column signal…
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