Integrated circuit with configurable on-die termination
US-2024146304-A1 · May 2, 2024 · US
US8937488B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8937488-B2 |
| Application number | US-201414266217-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 30, 2014 |
| Priority date | Oct 17, 2011 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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A semiconductor device has a first controlled chip, including a first replica output circuit having the same configuration as a first output circuit, a first ZQ terminal connected to the first replica output circuit, a first through electrode connected to the first ZQ terminal, and a first control circuit which sets the impedance of the first replica output circuit. A control chip includes a second ZQ terminal connected to the first through electrode, a comparator circuit which compares a voltage of the second ZQ terminal with a reference voltage, and a second control circuit 123 which performs a process based on a comparison by the comparator circuit. The first control circuit and the second control circuit receive a common input signal to operate and sequentially change and set the impedance until the comparison result changes when an external resistance element is connected to the second ZQ terminal.
Opening claim text (preview).
What is claimed is: 1. A method to calibrate an impedance of a device having a plurality of stacked semiconductor devices interconnected by through electrodes, the method comprising: coupling a resistor between an external terminal of the device and a first voltage source; and in each semiconductor device of the plurality of stacked semiconductor devices; enabling a replica output circuit having a first plurality of transistors connected between a second voltage source and a fi…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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