Substrate structure, semiconductor device array and semiconductor device having the same

US8937375B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8937375-B2
Application numberUS-201213468790-A
CountryUS
Kind codeB2
Filing dateMay 10, 2012
Priority dateJul 15, 2011
Publication dateJan 20, 2015
Grant dateJan 20, 2015

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A substrate structure has a first surface and a second surface. A plurality of carrying members are formed on the first surface and a plurality of conductive traces are formed on the second surface. In addition, the substrate structure has a first, a second and a third thermal stress relief structures. The first thermal stress relief structure is that lengths of the substrate structure in different axial directions are substantially equal to each other. The second thermal stress relief structure is that a plurality of separated alignment marks are formed on the substrate structure. The third thermal stress relief structure is that the substrate structure has at least one clearance area extending along one of the axial directions of the substrate structure and the clearance area has no carrying members and no conductive traces formed thereon.

First claim

Opening claim text (preview).

What is claimed is: 1. A substrate structure being laminated by pressing composite materials and metal materials, the substrate structure comprising: a core layer, made of insulating material having a first surface and a second surface opposite to the first surface; a plurality of carrying members, made of metal, being formed on the first surface of the core layer for respectively receiving a plurality of semiconductor elements thereon; a plurality of conductive traces being f…

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What does patent US8937375B2 cover?
A substrate structure has a first surface and a second surface. A plurality of carrying members are formed on the first surface and a plurality of conductive traces are formed on the second surface. In addition, the substrate structure has a first, a second and a third thermal stress relief structures. The first thermal stress relief structure is that lengths of the substrate structure in diffe…
Who is the assignee on this patent?
Lin Chen-Hsiu, Lite On Electronics Guangzhou, Lite On Technology Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/479. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).