Gate driver system for detecting a short circuit condition
US-2024388284-A1 · Nov 21, 2024 · US
Two-stage post driver circuit
US8933730B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8933730-B2 |
| Application number | US-201314107052-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 16, 2013 |
| Priority date | Mar 2, 2011 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A two-stage post driver circuit includes a controlling circuit, a pull-up unit and a pull-down unit. A first N-type transistor of the pull-down unit and a first P-type transistor of the pull-up unit are both connected to an output pad. The controlling circuit is used for controlling the first N-type transistor and the first P-type transistor. Consequently, when the pull-up unit or the pull-down unit is turned on, the voltage difference between the drain terminal and the source terminal of the first N-type transistor or the first P-type transistor is lower than a voltage stress.
First claim
Opening claim text (preview).
What is claimed is: 1. A two-stage post driver circuit, for receiving a core output signal from a core circuit, and generating a pad output signal to an output pad, comprising: a controlling circuit, for receiving the core output signal and the pad output signal, and generating a first pull-down controlling signal and a second pull-down controlling signal according to the core output signal; a pull-down unit comprising a first N-type transistor and a second N-type transistor, wh…
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Classifications
Electricity · mapped topic
- H03K17/08104Primary
Electricity · mapped topic
- H03K19/00315Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8933730B2 cover?
- A two-stage post driver circuit includes a controlling circuit, a pull-up unit and a pull-down unit. A first N-type transistor of the pull-down unit and a first P-type transistor of the pull-up unit are both connected to an output pad. The controlling circuit is used for controlling the first N-type transistor and the first P-type transistor. Consequently, when the pull-up unit or the pull-down…
- Who is the assignee on this patent?
- Global Unichip Corp, Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification H03K17/08104. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).