Solid-state imaging device, package, and imaging system
US-2024323556-A1 · Sep 26, 2024 · US
US8933562B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8933562-B2 |
| Application number | US-201313748821-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 24, 2013 |
| Priority date | Jan 24, 2013 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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Methods and structures for thermoelectric cooling of 3D semiconductor structures are disclosed. Thermoelectric vias (TEVs) to form a thermoelectric cooling structure. The TEVs are formed with an etch process similar to that used in forming electrically active through-silicon vias (TSVs). However, the etched cavities are filled with materials that exhibit the thermoelectric effect, instead of a conductive metal as with a traditional electrically active TSV. The thermoelectric materials are arranged such that when a voltage is applied to them, the thermoelectric cooling structure carries heat away from the interior of the structure from the junction where the thermoelectric materials are electrically connected.
Opening claim text (preview).
What is claimed is: 1. A semiconductor structure comprising: a die comprised of a semiconductor material, and comprising a back-end-of-line wiring structure formed thereon; a conductive region disposed within the die; a first thermoelectric via (TEV) originating from a top surface of the semiconductor structure and terminating at the conductive region; a second TEV originating from the top surface and terminating at the conductive region, wherein the first TEV and second TEV…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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