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Wafers and chips comprising test structures
US8933448B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8933448-B2 |
| Application number | US-201213560897-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 27, 2012 |
| Priority date | Jul 27, 2012 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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Abstract
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Wafers with chips thereon and corresponding chips are provided where test structures or parts thereof are provided in a peripheral chip area of the chip. Corresponding methods are also disclosed.
First claim
Opening claim text (preview).
What is claimed is: 1. A wafer comprising: a plurality of chips, said chips being separated from each other by a kerf region; and a chip of the plurality of chips comprising a main area with a semiconductor device disposed therein and a peripheral chip area, wherein the peripheral chip area designates an area of the chip extending from an edge inwards along at least part of the edge, wherein a test structure is disposed in said peripheral chip area, and wherein said peripheral c…
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Electricity · mapped topic
- H10P54/00Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8933448B2 cover?
- Wafers with chips thereon and corresponding chips are provided where test structures or parts thereof are provided in a peripheral chip area of the chip. Corresponding methods are also disclosed.
- Who is the assignee on this patent?
- Zundel Markus, Schmalzbauer Uwe, Infineon Technologies Ag
- What technology area does this patent fall under?
- Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).