Multiplying analog-to-digital converter and pipeline analog-to-digital converter using the same

US8928504B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8928504-B2
Application numberUS-201313759365-A
CountryUS
Kind codeB2
Filing dateFeb 5, 2013
Priority dateMay 30, 2012
Publication dateJan 6, 2015
Grant dateJan 6, 2015

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Abstract

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A multiplying analog-to-digital converter is provided. A sample-and-hold unit samples an analog signal, to obtain a sample level. A analog-to-digital converting unit converts the analog signal to a digital signal. A digital-to-analog converting unit converts the digital signal to a recovered signal level. A operating unit provides an output signal according to the difference between the sample level and the recovered signal level. A comparator compares a level of the output signal with an upper threshold level and a lower threshold level, and accordingly provides an indicating signal, wherein the upper and lower threshold levels define a predetermined level range. When the indicating signal indicates that the level of the output signal is outside the predetermined level range, a controller shifts a value of the digital signal and accordingly provides an adjusted digital signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A multiplying analog-to-digital converter, comprising: a sample-and-hold unit, for sampling an analog signal to obtain a sample level; an analog-to-digital converting unit, for converting the analog signal to obtain a digital signal, wherein the level range of the digital signal is between a minimum and a maximum; a digital-to-analog converting unit, for converting the digital signal to obtain a recovered signal level; an operating unit, for providing an output signal according to the difference between the sample level and the recovered signal level; a comparator, for comparing the level of the output signal with an upper threshold level and a lower threshold level and accordingly providing an indicating signal representing the comparison result, wherein the upper threshold level and the lower threshold level define a predetermined level range; and a controller, for shifting a value of the digital signal and accordingly providing an adjusted digital signal when the indicating signal indicates that the level of the output signal is outside the predetermined level range. 2. The multiplying analog-to-digital converter according to claim 1 , wherein the operating unit comprises: a subtractor, for subtracting the recovered signal level from the sample level; and an operation amplifier, for generating the output signal according to the subtraction result of the subtractor. 3. The multiplying analog-to-digital converter according to claim 1 , wherein the controller adds a predetermined value to the value of the digital signal when the indicating signal indicates that the level of the output signal is substantially higher than the upper threshold level and the digital signal is smaller than the maximum. 4. The multiplying analog-to-digital converter according to claim 1 , wherein the controller subtracts a predetermined value from the value of the digital signal when the indicating signal indicates that the level of the output signal is substantially lower than the lower threshold level and the digital signal is larger than the minimum. 5. The multiplying analog-to-digital converter according to claim 1 , wherein the indicating signal comprises a first sub-indicating signal and a second sub-indicating signal, and the comparator comprises: a first sub-comparator, for comparing the level of the output signal and the upper threshold level, and providing an enabled first sub-indicating signal indicating that the output signal is substantially higher than the upper threshold level; and a second sub-comparator, for comparing the level of the output signal and the lower threshold level and providing an enabled second sub-indicating signal when the output signal is substantially lower than the lower threshold level. 6. The multiplying analog-to-digital converter according to claim 1 , wherein the sample-and-hold unit, the digital-to-analog converting unit and the operating unit are implemented by a switch capacitor circuit. 7. A multiplying analog-to-digital converter, comprising: an analog-to-digital converting unit, converting an analog signal to obtain a digital signal, wherein the level range of the digital signal is between a minimum and a maximum; a switch capacitor circuit, for providing an output signal according to the analog signal and the digital signal; a comparator, for comparing the level of the output signal with an upper threshold level and a lower threshold level, and providing an indicating signal representing the comparison result, wherein the upper threshold level and the lower threshold level define a predetermined level range; and a controller, for shifting a value of the digital signal and accordingly provides an adjusted digital signal when the indicating signal indicates that the level of the output signal is outside the predetermined level range. 8. The multiplying analog-to-digital converter according to claim 7 , wherein the switch capacitor circuit comprises: one or more switches coupled to the analog signal, wherein at least one of the switches is used for switching according to the digital signal; one or more capacitors coupled to the one or more switches; and an operation amplifier, comprising an input node and an output node, wherein the input node is coupled to the one or more capacitors and the output node generates the output signal. 9. The multiplying analog-to-digital converter according to claim 7 , wherein the controller adds a predetermined value to the value of the digital signal when the indicating signal indicates that the level of the output signal is substantially higher than the upper threshold level and the digital signal is smaller than the maximum. 10. The multiplying analog-to-digital converter according to claim 7 , wherein the controller subtracts a predetermined value from the value of the digital signal when the indicating signal indicates that the level of the output signal is substantially lower than the lower threshold level and the digital signal is larger than the minimum. 11. The multiplying analog-to-digital converter according to claim 7 , wherein the indicating signal comprises a first sub-indicating signal and a second sub-indicating signal, and the comparator comprises: a first sub-comparator, for comparing the level of the output signal and the upper threshold level and providing an enabled first sub-indicating signal when the output signal is substantially higher than the upper threshold level; and a second sub-comparator, for comparing the output signal and the lower threshold level and providing an enabled second sub-indicating signal when the output signal is substantially lower than the lower threshold level. 12. A pipeline analog-to-digital converter, comprising: the multiplying analog-to-digital converter according to claim 1 ; and one or more post-stage multiplying analog-to-digital converters providing a second digital signal according to the output signal. 13. A pipeline analog-to-digital converter, comprising: the multiplying analog-to-digital converter according to claim 7 ; and one or more post-stage multiplying analog-to-digital converters providing a second digital signal according to the output signal. 14. A multiplying analog-to-digital converter, comprising: a sample-and-hold unit, for sampling an analog signal to obtain a sample level; an analog-to-digital converting unit, for converting an analog signal to obtain a digital signal; a digital-to-analog converting unit, for converting the digital signal to obtain a recovered signal level; and an adjusting circuit, configured to adjust the digital signal according to a difference between the sample level and the recovered signal level. 15. The multiplying analog-to-digital converter according to claim 14 , wherein the adjusting circuit judges whether the difference is within a predetermined range and adjusts the digital signal according to a result of the judgment. 16. The multiplying analog-to-digital converter according to claim 15 , wherein the adjusting circuit comprises: an operating unit, for providing an output signal according to the difference between the sample level and the recovered signal level; a comparator, for comparing the level of the output signal with a plurality of threshold levels corresponding to the predetermined rage; and a controller, for adjusting the digital signal according to a result of the comparison. 17. A multiplying analog-to-digital converter, comprising: an analog-to-digital converting unit, converting an analog signal to obtain a digital signal; a switch

Assignees

Inventors

Classifications

  • H03M1/1014Primary

    at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M1/18) · CPC title

  • Sequential comparisons in series-connected stages with change in value of analogue signal · CPC title

  • H03M1/009Primary

    Electricity · mapped topic

  • using less than the maximum number of output states per stage or step, e.g. 1.5 per stage or less than 1.5 bit per stage type · CPC title

  • Sampling or signal conditioning arrangements specially adapted for A/D converters · CPC title

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What does patent US8928504B2 cover?
A multiplying analog-to-digital converter is provided. A sample-and-hold unit samples an analog signal, to obtain a sample level. A analog-to-digital converting unit converts the analog signal to a digital signal. A digital-to-analog converting unit converts the digital signal to a recovered signal level. A operating unit provides an output signal according to the difference between the sample …
Who is the assignee on this patent?
Novatek Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H03M1/1014. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).