Memory devices configured to provide external regulated voltages

Patent metadata

Field	Value
Publication number	US-2026080931-A1
Application number	US-202519397322-A
Country	US
Kind code	A1
Filing date	Nov 21, 2025
Priority date	Feb 26, 2018
Publication date	Mar 19, 2026
Grant date	—

Abstract

Memory devices, systems including memory devices, and methods of operating memory devices and systems in which a memory device can include a voltage regulator for adjusting a supply voltage to an output voltage and providing the output voltage to other devices external to the memory device (e.g., other memory devices in the same memory system, processors, graphics chipsets, other logic circuits, expansion cards, etc.). A memory device may comprise one or more external inputs configured to receive a supply voltage having a first voltage level; a voltage regulator configured to receive the supply voltage from the one or more external inputs and to output an output voltage having a second voltage level different from the first voltage level; one or more memories configured to receive the output voltage from the voltage regulator; and one or more external outputs configured to supply the output voltage to one or more connected devices.

First claim

What is claimed is:

1 . An apparatus, comprising:
one or more dynamic random access memory (DRAM) devices; and a power management integrated circuit (PMIC) coupled with a power supply and the one or more DRAM devices, the PMIC configured to:
receive a supply voltage from the power supply;
generate one or more first outputs based at least in part on the supply voltage, wherein the one or more first outputs are based at least in part on parameters included in a set of registers;
receive, from a host device, a first command that modifies information included in a first register of the set of registers; and
generate one or more second outputs based at least in part on the information being modified in response to the first command.

2 . The apparatus of claim 1 , wherein the PMIC is further configured to:
receive second command to provide the information included in the first register; and transmit an indication of at least a portion of the information included in the first register in response to the second command.

3 . The apparatus of claim 1 , wherein, to generate the one or more second outputs, the PMIC is further configured to:
generate the one or more second outputs based at least in part on providing the supply voltage to one or more voltage regulators.

4 . The apparatus of claim 1 , wherein the PMIC is further configured to:
provide the one or more second outputs to one or more connected devices based at least in part on generating the one or more second outputs.

5 . The apparatus of claim 1 , wherein the PMIC is further configured to:
generate the one or more first outputs, the one or more second outputs, or any combination thereof, based at least in part on providing the supply voltage to a set of voltage regulators.

6 . The apparatus of claim 1 , wherein the one or more first outputs, the one or more second outputs, or any combination thereof, comprise a different voltage level than the supply voltage.

7 . The apparatus of claim 1 , wherein generating the one or more first outputs is in accordance with an order in which the one or more first outputs are powered up.

8 . The apparatus of claim 1 , wherein the PMIC is further configured to:
power down the one or more second outputs based at least in part on an order in which the one or more second outputs are powered down.

9 . An apparatus, comprising:
a dual in-line memory module (DIMM) comprising at least one power management integrated circuit (PMIC); and a host device coupled with the DIMM, wherein the host device is configured to:
provide a supply voltage to the at least one PMIC, wherein one or more outputs of the at least one PMIC is based at least in part on the supply voltage;
receive an indication of information included in one or more registers associated with the at least one PMIC; and
output a first command that modifies the information included in the one or more registers, wherein the first command is based at least in part on the indication.

10 . The apparatus of claim 9 , wherein the host device is further configured to:
output a second command requesting the information included in the one or more registers, wherein the indication is received in accordance with the second command.

11 . The apparatus of claim 9 , wherein the first command that modifies the information is associated with modifying the one or more outputs.

12 . The apparatus of claim 9 , wherein the information comprises first information about a voltage level of an output voltage of the at least one PMIC, second information about operation of the at least one PMIC, or any combination thereof.

13 . A method, comprising:
generating one or more first outputs based at least in part on a supply voltage provided by a host device, wherein the one or more first outputs are based at least in part on first information included in a set of registers; receiving, from the host device, a first command that modifies second information included in at least one register of the set of registers; and generating one or more second outputs based at least in part on the second information included in the at least one register being modified based at least in part on the first command.

14 . The method of claim 13 , further comprising:
receiving, from the host device, a second command to provide the second information included in the at least one register; and transmitting, to the host device, an indication of the second information included in the at least one register.

15 . The method of claim 13 , wherein generating the one or more second outputs further comprises:
generating the one or more second outputs based at least in part on providing the supply voltage to one or more voltage regulators.

16 . The method of claim 13 , further comprising:
providing the one or more second outputs to one or more connected devices based at least in part on generating the one or more second outputs.

17 . The method of claim 13 , further comprising:
generating the one or more first outputs, the one or more second outputs, or any combination thereof, based at least in part on providing the supply voltage to a set of voltage regulators.

18 . The method of claim 13 , wherein the one or more first outputs, the one or more second outputs, or any combination thereof, comprise a different voltage level than a supply voltage level corresponding to the supply voltage.

19 . The method of claim 13 , wherein generating the one or more first outputs is in accordance with an order in which the one or more first outputs are powered up.

20 . The method of claim 13 , further comprising:
powering down the one or more second outputs based at least in part on an order in which the one or more second outputs are powered down.

Assignees

• Lodestar Licensing Group Llc

Inventors

• Prather Matthew A
• Kinsley Thomas H

Classifications

• H02M3/156

  with automatic control of output voltage or current, e.g. switching regulators · CPC title

• G06F1/26

  Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

• G06F13/102 Primary

  where the program performs an interfacing function, e.g. device driver (G06F13/105 takes precedence; contention policies within device drivers G06F9/4881; scheduling within device drivers G06F9/52) · CPC title

• G11C5/04

  Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports · CPC title

• G11C11/4074 Primary

  Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits · CPC title