Storage device including dummy word lines and operating method thereof

Patent metadata

Field	Value
Publication number	US-2026057947-A1
Application number	US-202519265581-A
Country	US
Kind code	A1
Filing date	Jul 10, 2025
Priority date	Aug 23, 2024
Publication date	Feb 26, 2026
Grant date	—

Abstract

Disclosed is a storage device which includes a non-volatile memory device and a storage controller. Based on a program request for a target memory cell of a first stack, the storage controller provides a first program command to the non-volatile memory device, in response to determining that the number of programmed memory cells of a second stack is one or more. The second stack includes a first dummy word line and a second dummy word line disposed adjacent to an upper end and a lower end of the second stack, respectively. Based on the first program command, control logic applies a first voltage greater than a pass voltage to a dummy word line closer to the first stack and applies a second voltage smaller than the pass voltage to a dummy word line more.

First claim

What is claimed is:

1 . A storage device comprising:
a non-volatile memory device including at least one memory block divided into a plurality of stacks arranged in sequence in a vertical direction; and a storage controller, wherein the storage controller is configured to, based on a program request for a target memory cell of a first stack among the plurality of stacks:
determine that a number of programmed memory cells of a second stack among the plurality of stacks is one or more, and
based on determining that the number of the programmed memory cells of the second stack is one or more, provide a first program command to the non-volatile memory device,
wherein the second stack includes a first dummy word line and a second dummy word line arranged adjacent to an upper end and a lower end of the second stack, respectively, and wherein control logic of the non-volatile memory device is configured to, based on the first program command:
apply a first voltage, greater than a pass voltage applied to an unselected word line of the non-volatile memory device, to a dummy word line closer to the first stack from among the first and second dummy word lines, and
apply a second voltage, smaller than the pass voltage, to a dummy word line more distant from the first stack from among the first and second dummy word lines.

2 . The storage device of claim 1 , wherein the control logic of the non-volatile memory device is configured to:
apply the first voltage to the dummy word line closer to the first stack from (i) a first time point after a verification interval and before a program execution interval to (ii) a second time point in the program execution interval; and apply the second voltage to the dummy word line more distant from the first stack from (i) a third time point after the verification interval and before the program execution interval to (ii) a fourth time point in the program execution interval.

3 . The storage device of claim 2 , wherein each of the first time point and the second time point is after an initial word line setting interval and before the program execution interval.

4 . The storage device of claim 1 , wherein the storage controller is configured to, based on a second program request, provide a second program command to the non-volatile memory device in response to determining that a programmed memory cell is absent from the second stack, and
wherein the control logic of the non-volatile memory device is configured to, based on the second program command, apply the pass voltage to each of the first and second dummy word lines, during a program execution interval.

5 . The storage device of claim 1 , wherein the non-volatile memory device is configured to program the at least one memory block in a top-to-bottom (T2B) manner,
wherein the first stack is disposed above the second stack in the vertical direction, and wherein the control logic of the non-volatile memory device is configured to apply the first voltage to the first dummy word line and to apply the second voltage to the second dummy word line.

6 . The storage device of claim 1 , wherein the non-volatile memory device is configured to program the at least one memory block in a bottom-to-top (B2T) manner,
wherein the second stack is disposed above the first stack in the vertical direction, and wherein the control logic of the non-volatile memory device is configured to apply the first voltage to the second dummy word line and to apply the second voltage to the first dummy word line.

7 . The storage device of claim 1 , wherein the first voltage is greater than a threshold voltage for turning on a dummy memory cell connected to the dummy word line closer to the first stack.

8 . The storage device of claim 1 , wherein the second voltage is smaller than or equal to a threshold voltage for turning off a dummy memory cell connected to the dummy word line more distant from the first stack.

9 . The storage device of claim 1 , wherein the target memory cell is connected to a selected word line and a first selected string, and
wherein the control logic of the non-volatile memory device is configured to: boost a channel voltage of an inhibit cell connected to the selected word line and a second selected string, by applying the first voltage to the dummy word line closer to the first stack during a program execution interval for programming the target memory cell; and reduce leakage in the vertical direction through the first selected string, by applying the second voltage to the dummy word line more distant from the first stack during the program execution interval.

10 . The storage device of claim 1 , wherein the storage controller includes:
a program table configured to store program status information corresponding to the first stack and the second stack; a dummy word line manager configured to determine whether the number of the programmed memory cells of the second stack is one or more, by referring to the program table; and a command manager configured to generate the first program command and to provide the first program command to the non-volatile memory device, based on determining that the number of the programmed memory cells of the second stack is one or more.

11 . A storage device comprising:
a non-volatile memory device including at least one memory block divided into a plurality of stacks arranged in sequence in a vertical direction; and a storage controller, wherein the storage controller is configured to, based on a program request for a target memory cell of a first stack among the plurality of stacks:
determine that a combined number of programmed memory cells of a second stack and a third stack among the plurality of stacks is one or more, and
based on determining that the combined number of the programmed memory cells is one or more, provide a first program command to the non-volatile memory device,
wherein the second stack includes a first dummy word line and a second dummy word line disposed adjacent to an upper end and a lower end of the second stack, respectively, wherein the third stack includes a third dummy word line and a fourth dummy word line disposed adjacent to an upper end and a lower end of the third stack, respectively, and wherein control logic of the non-volatile memory device is configured to, based on the first program command:
apply a first voltage, greater than a pass voltage applied to an unselected word line of the non-volatile memory device, to a dummy word line closest to the first stack from among the first to fourth dummy word lines, and
apply a second voltage, smaller than the pass voltage, to a dummy word line most distant from the first stack from among the first to fourth dummy word lines.

12 . The storage device of claim 11 , wherein the control logic of the non-volatile memory device is configured to:
apply the first voltage to the dummy word line closest to the first stack from (i) a first time point after a verification interval and before a program execution interval to (ii) a second time point in the program execution interval; and apply the second voltage to the dummy word line most distant from the first stack from (i) a third time point after the verification interval and before the program execution interval to (ii) a fourth time point in the program execution interval.

13 . The storage device of claim 11 , wherein the non-volatile memory device is configured to program the at least one memory block in a top-to-bottom (T2B) manner,
wherein the first stack is disposed above the second stack in the vertical direction, wherein the second stack is disposed above t

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Yejin
• Kim Shinkeun
• Choi Na-Young
• Lee Ji-Sang

Classifications

• G11C16/32

  Timing circuits · CPC title

• G11C11/5628

  Programming or writing circuits; Data input circuits · CPC title

• G11C16/10

  Programming or data input circuits · CPC title

• G11C16/3427

  Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written · CPC title

• G11C16/0483

  comprising cells having several storage transistors connected in series · CPC title