Debondable test wafer/probe card

US2026043830A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2026043830-A1
Application numberUS-202418799794-A
CountryUS
Kind codeA1
Filing dateAug 9, 2024
Priority dateAug 9, 2024
Publication dateFeb 12, 2026
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A probe card for probing a semiconductor substrate is disclosed. The probe card can include a probing element having a hybrid bonding surface that is configured to removably hybrid bond to a semiconductor element. The hybrid bonding surface of the probing element can include a nonconductive layer and contact pads at least partially embedded in the nonconductive layer. The contact pads of the probing element can be bonded to probe pads of the semiconductor element. Additionally, the nonconductive layer of the probing element can be bonded to a nonconductive layer of the semiconductor element. A conductive material can be deposited over the contact pads. The conductive material can comprise a lower melting point than the contact pads. The conductive material can comprise at least one of a low melting point metal and conductive polymer.

First claim

Opening claim text (preview).

1 .- 96 . (canceled) 97 . A probe card for probing a semiconductor substrate, the probe card comprising: a probing element having a hybrid bonding surface that removably hybrid bonds to a semiconductor element, the hybrid bonding surface of the probing element comprising a nonconductive layer and contact pads at least partially embedded in the nonconductive layer; wherein the contact pads of the probing element are bonded to probe pads of the semiconductor element; and wherein the nonconductive layer of the probing element is bonded to a nonconductive layer of the semiconductor element. 98 . The probe card of claim 97 , further comprising an optical device connected to the hybrid bonding surface. 99 . The probe card of claim 97 , wherein a conductive material is deposited over the contact pads. 100 . The probe card of claim 99 , wherein the conductive material comprises a lower melting point than the contact pads. 101 . The probe card of claim 97 , further comprising: a test interface substrate; wherein the probing element further comprises a base layer having one or more vias extending through the base layer and routing layers having a first surface and a second surface opposite the first surface, the first surface of the routing layers attached to the base layer; and wherein the one or more vias of the base layer electrically connect the test interface substrate and the probing element. 102 . The probe card of claim 101 , wherein the test interface substrate comprises testing circuitry configured to test physical functionality, electrical connectivity and functionality, and optical functionality of the semiconductor element. 103 . The probe card of claim 101 , further comprising a conductive adhesive connecting the one or more vias of the base layer to the test interface substrate. 104 . The probe card of claim 97 , further comprising elastic biasing members connected to the contact pads and configured to cause reversible contact between the contact pads of the probing element and the probe pads of the semiconductor element. 105 . The probe card of claim 97 , further comprising one or more channels in communication with the contact pads, wherein the one or more channels are configured for liquid metal injection for providing electrical communication between the probing element and the probe pads of the semiconductor element during probing of the semiconductor element. 106 . A probe card for probing a semiconductor substrate, the probe card comprising: a probing element having a hybrid bonding surface that is prepared to removably hybrid bond to a semiconductor element, the hybrid bonding surface comprising a nonconductive layer and contact pads at least partially embedded in the nonconductive layer, wherein the contact pads of the probing element are configured to be bonded to probe pads of the semiconductor element, and wherein the nonconductive layer of the probing element is configured to be bonded to a nonconductive layer of the semiconductor element; and elastic biasing members connected to the contact pads and configured to cause reversible contact between the contact pads of the probing element and the probe pads of the semiconductor element. 107 . The probe card of claim 106 , wherein a conductive material is deposited over the contact pads. 108 . The probe card of claim 106 , further comprising: a test interface substrate; wherein the probing element further comprises a base layer having one or more vias extending through the base layer and routing layers having a first surface and a second surface opposite the first surface, the first surface of the routing layers attached to the base layer; and wherein the one or more vias of the base layer electrically connect the test interface substrate and the probing element. 109 . The probe card of claim 108 , wherein the test interface substrate comprises testing circuitry, wherein the testing circuitry tests physical functionality, electrical connectivity and functionality, and optical functionality of the semiconductor element. 110 . The probe card of claim 108 , further comprising a conductive adhesive connecting the one or more vias of the base layer to the test interface substrate. 111 . A probe card for probing a semiconductor substrate, the probe card comprising: a probing element having a hybrid bonding surface that is prepared to removably hybrid bond to a semiconductor element, the hybrid bonding surface comprising a nonconductive layer and contact pads at least partially embedded in the nonconductive layer, wherein the contact pads of the probing element are to be bonded to probe pads of the semiconductor element, and wherein the nonconductive layer of the probing element is configured to be bonded to a nonconductive layer of the semiconductor element; and one or more channels in communication with the contact pads, wherein the one or more channels are configured for liquid metal injection for providing electrical communication between the probing element and the probe pads of the semiconductor element during probing of the semiconductor element. 112 . The probe card of claim 111 , wherein the injected liquid metal comprises at least one of gallium, indium, tin, zinc, bismuth, mercury, cadmium, thallium, and lead. 113 . The probe card of claim 111 , wherein a conductive material is deposited over the contact pads. 114 . The probe card of claim 111 , further comprising: a test interface substrate; having a base layer, wherein the test interface substrate comprises one or more vias extending through the test interface substrate; wherein the probing element further comprises a base layer having one or more vias extending through the base layer and routing layers having a first surface and a second surface opposite the first surface, the first surface of the routing layers attached to the base layer; and wherein the one or more vias of the base layer electrically connect the test interface substrate and the probing element. 115 . The probe card of claim 114 , wherein the test interface substrate comprises testing circuitry, wherein the testing circuitry tests physical functionality, electrical connectivity and functionality, and optical functionality of the semiconductor element. 116 . The probe card of claim 114 , further comprising a conductive adhesive connecting the one or more vias of the base layer to the test interface substrate.

Assignees

Inventors

Classifications

  • using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence) · CPC title

  • Interfaces, e.g. between probe and tester (G01R31/31905 and G01R1/07364 take precedence) · CPC title

  • related to layers · CPC title

  • the body of the probe being at an angle other than perpendicular to test object, e.g. probe card · CPC title

  • Features relating to contacting the IC under test, e.g. probe heads; chucks (G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2026043830A1 cover?
A probe card for probing a semiconductor substrate is disclosed. The probe card can include a probing element having a hybrid bonding surface that is configured to removably hybrid bond to a semiconductor element. The hybrid bonding surface of the probing element can include a nonconductive layer and contact pads at least partially embedded in the nonconductive layer. The contact pads of the pr…
Who is the assignee on this patent?
Adeia Semiconductor Bonding Technologies Inc
What technology area does this patent fall under?
Primary CPC classification G01R1/07342. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Feb 12 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).