Semiconductor device
US-2024421048-A1 · Dec 19, 2024 · US
Semiconductor Device and Method of Disposing Electrical Components Above and Below Substrate
US2026040961A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2026040961-A1 |
| Application number | US-202519351599-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 7, 2025 |
| Priority date | Mar 30, 2021 |
| Publication date | Feb 5, 2026 |
| Grant date | — |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor device has a substrate with a die mounting site and a plurality of leads. A first electrical component is disposed over a first surface of the die mounting site. A second electrical component is disposed over a second surface of the die mounting site opposite the first surface of the die mounting site. A first bond wire is coupled between the first electrical component and a first lead, and a second bond wire is coupled between the second electrical component and a second lead. A first encapsulant is deposited over the first electrical component, and a second encapsulant is deposited over the second electrical component with the leads exposed between the first encapsulant and second encapsulant. The leads are exposed from the first encapsulant and second encapsulant on a side of the semiconductor device.
First claim
Opening claim text (preview).
What is claimed: 1 . A method of making a semiconductor device, comprising: providing a first substrate including a die mounting site and a plurality of leads; disposing a first electrical component over a first surface of the die mounting site; disposing a second electrical component over a second surface of the die mounting site opposite the first surface of the die mounting site; and depositing an encapsulant over the first electrical component and the second electrical component. 2 . The method of claim 1 , wherein depositing the encapsulant includes: depositing a first encapsulant over the first electrical component; and depositing a second encapsulant over the second electrical component. 3 . The method of claim 2 , further including forming a first notch through the second encapsulant and extending to one of the plurality of leads. 4 . The method of claim 3 , further including forming a second notch through the first encapsulant and extending to the one of the plurality of leads to form a detached semiconductor package with the first encapsulant containing the first electrical component and second encapsulant containing the second electrical component. 5 . The method of claim 4 , wherein a surface area of the first encapsulant is greater than a surface area of the second encapsulant within the detached semiconductor package. 6 . The method of claim 2 , further including: providing a second substrate; and disposing the second encapsulant and second electrical component through an opening in the second substrate. 7 . A method of making a semiconductor device, comprising: providing a first substrate; disposing a first electrical component over a first surface of the first substrate; disposing a second electrical component over a second surface of the first substrate opposite the first surface of the first substrate; and depositing an encapsulant over the first electrical component and the second electrical component. 8 . The method of claim 7 , wherein depositing the encapsulant includes: depositing a first encapsulant over the first electrical component; and depositing a second encapsulant over the second electrical component. 9 . The method of claim 8 , further including forming a first notch through the second encapsulant. 10 . The method of claim 9 , further including forming a second notch through the first encapsulant to form a detached semiconductor package with the first encapsulant containing the first electrical component and second encapsulant containing the second electrical component. 11 . The method of claim 10 , wherein a surface area of the first encapsulant is greater than a surface area of the second encapsulant within the detached semiconductor package. 12 . The method of claim 8 , further including: providing a second substrate; and disposing the second encapsulant and second electrical component through an opening in the second substrate. 13 . The method of claim 7 , further including: providing a first bond wire coupled between the first electrical component and a first lead on the substrate; and providing a second bond wire coupled between the second electrical component and a second lead on the substrate. 14 . A method of making a semiconductor device, comprising: providing a first substrate including a die mounting site; disposing a first electrical component over a first surface of the die mounting site; and disposing a second electrical component over a second surface of the die mounting site opposite the first surface of the die mounting site. 15 . The method of claim 14 , further including: depositing a first encapsulant over the first electrical component; and depositing a second encapsulant over the second electrical component. 16 . The method of claim 15 , further including forming a first notch through the second encapsulant. 17 . The method of claim 16 , further including forming a second notch through the first encapsulant to form a detached semiconductor package with the first encapsulant containing the first electrical component and second encapsulant containing the second electrical component. 18 . The method of claim 17 , wherein a surface area of the first encapsulant is greater than a surface area of the second encapsulant within the detached semiconductor package. 19 . The method of claim 15 , further including: providing a second substrate; and disposing the second encapsulant and second electrical component through an opening in the second substrate. 20 . The method of claim 14 , further including: providing a first bond wire coupled between the first electrical component and a first lead on the substrate; and providing a second bond wire coupled between the second electrical component and a second lead on the substrate.
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US2026040961A1 cover?
- A semiconductor device has a substrate with a die mounting site and a plurality of leads. A first electrical component is disposed over a first surface of the die mounting site. A second electrical component is disposed over a second surface of the die mounting site opposite the first surface of the die mounting site. A first bond wire is coupled between the first electrical component and a fir…
- Who is the assignee on this patent?
- Utac Headquarters Pte Ltd
- What technology area does this patent fall under?
- Primary CPC classification H01L24/48. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Feb 05 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).