Sideband interface using CQEs

Patent metadata

Field	Value
Publication number	US-2025286828-A1
Application number	US-202519067914-A
Country	US
Kind code	A1
Filing date	Mar 2, 2025
Priority date	Mar 5, 2024
Publication date	Sep 11, 2025
Grant date	—

Abstract

A network device includes a hardware-implemented packet processing pipeline includes: multiple pipeline stages, and a processor. The hardware-implemented packet processing pipeline is to process packets exchanged with a packet network. The processor is to execute sideband tasks for the packet processing pipeline. At least one of the pipeline stages is to trigger the processor to execute a sideband task by posting a Completion-Queue Element (CQE) on a Completion Queue (CQ) accessible to the processor.

First claim

1 . A network device, comprising:
a hardware-implemented packet processing pipeline comprising multiple pipeline stages, to process packets exchanged with a packet network; and a processor, to execute sideband tasks for the packet processing pipeline, wherein at least one of the pipeline stages is to trigger the processor to execute a sideband task by posting a Completion-Queue Element (CQE) on a Completion Queue (CQ) accessible to the processor.

2 . The network device according to claim 1 , wherein the at least one of the pipeline stages comprises an ingress-packet pipeline stage.

3 . The network device according to claim 1 , wherein the at least one of the pipeline stages comprises an egress-packet pipeline stage.

4 . The network device according to claim 1 , further comprising a host processor, to process incoming packets and generate outgoing packets via the packet processing pipeline.

5 . The network device according to claim 4 , wherein the host is further to execute at least part of the sideband tasks.

6 . The network device according to claim 1 , wherein the processor is to read the CQE from the CQ and to execute the sideband task specified by the CQE.

7 . The network device according to claim 1 , wherein two or more different pipeline stages in the packet processing pipeline are to trigger the processor to execute two or more respective different types of sideband tasks.

8 . The network device according to claim 7 , wherein the two or more different pipeline stages are to provide the processor with two or more respective different sets of metadata for executing the two or more different types of sideband tasks.

9 . The network device according to claim 1 , wherein the processor comprises a flow-control circuit, to control the CQ.

10 . The network device according to claim 1 , wherein the CQ is to send a CO status indication signal to the processor according to a fill measure of the CQ.

11 . The network device according to claim 10 , wherein the CQ status indication signal comprises a processor interrupt.

12 . The network device according to claim 1 , wherein the sideband task comprises congestion detection and notification.

13 . The network device according to claim 1 , wherein the sideband task comprises congestion detection and mitigation.

14 . The network device according to claim 1 , wherein the sideband task comprises acknowledgement packet processing.

15 . The network device according to claim 1 , wherein the sideband task comprises multipath processing.

16 . The network device according to claim 1 , wherein the sideband task comprises telemetry packet processing.

17 . The network device according to claim 1 , wherein the sideband task comprises network time measurement processing.

18 . The network device according to claim 1 , wherein the sideband task comprises Reliable Transport Time measurements.

19 . The network device according to claim 1 , wherein the sideband task comprises trimmed packet arrival processing.

20 . The network device according to claim 1 , wherein the sideband task comprises Implicit Loss Indication (ILI) processing.

21 . The network device according to claim 1 , wherein the sideband task comprises Explicit Congestion Notification (ECN) processing.

22 . The network device according to claim 1 , wherein the sideband task comprises tracking egress packets that meet preset criteria.

23 . The network device according to claim 1 , wherein the sideband task comprises duplicate ingress packet processing.

24 . A method for network communication, comprising:
processing packets exchanged with a packet network in a hardware-implemented packet processing pipeline comprising multiple pipeline stages; coupling a processor to execute sideband tasks for the packet processing pipeline; initiating execution of a sideband task by posting, by one of the pipeline stages, a Completion-Queue Element (CQE) on a Completion Queue (CQ) accessible to the processor; and executing the sideband task by the processor in response to the CQE.

25 . The method according to claim 24 , wherein the pipeline stage comprises an ingress-packet pipeline stage.

26 . The method according to claim 24 , wherein the pipeline stage comprises an egress-packet pipeline stage.

27 . The method according to claim 24 , further comprising coupling a host processor, to process incoming packets and generate outgoing packets via the packet processing pipeline.

28 . The method according to claim 27 , wherein the host is further to execute at least part of the sideband tasks.

29 . The method according to claim 24 , wherein executing the sideband task comprises reading the CQE from the CQ by the processor.

30 . The method according to claim 24 , wherein initiating the execution comprises posting two or more CQEs by two or more different pipeline stages in the packet processing pipeline to trigger the processor to execute two or more respective different types of sideband tasks.

31 . The method according to claim 30 , wherein posting the two or more CQEs comprises providing two or more respective different sets of metadata by the two or more different pipeline stages to the processor for executing the two or more different types of sideband tasks.

32 . The method according to claim 24 , further comprising controlling the flow of the CQ.

33 . The method according to claim 24 , further comprising sending a CQ status-indication signal to the processor according to a fill measure of the CQ.

34 . The method according to claim 33 , wherein the CQ status-indication signal comprises a processor interrupt.

35 . The method according to claim 24 , wherein the sideband task comprises at least one task selected from: congestion detection and notification, congestion detection and mitigation, acknowledgement packet processing, multipath processing, telemetry packet processing, network time measurement processing, Reliable Transport Time measurements, trimmed packet arrival processing, Implicit Loss Indication (ILI) processing, Explicit congestion notification (ECN) processing, tracking egress packets that meet preset criteria and duplicate ingress packet processing.

Assignees

• Mellanox Technologies Ltd

Inventors

• Shpigelman Yuval
• Cohen Elazar
• Friedman Yamin
• Shahar Ariel
• Moyal Roee
• Aisman Shay
• Urman Avi
• Haim Doron
• Tarnopolsky Saar
• Sharaffy Amir

Classifications

• H04L47/12

  Avoiding congestion; Recovering from congestion · CPC title

• H04L49/3063

  Pipelined operation · CPC title

• H04L47/6255 Primary

  queue load conditions, e.g. longest queue first · CPC title