Integrated circuit package and method
US-11935804-B2 · Mar 19, 2024 · US
US2025263862A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2025263862-A1 |
| Application number | US-202519189931-A |
| Country | US |
| Kind code | A1 |
| Filing date | Apr 25, 2025 |
| Priority date | Jan 10, 2020 |
| Publication date | Aug 21, 2025 |
| Grant date | — |
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A method of electroplating metal into features of a partially fabricated electronic device on a substrate having high open area portions is provided. The method includes initiating a bulk electrofill phase with a pulse at a high level of current; reducing the current to a baseline current level; and optionally increasing the current in one or more steps until electroplating is complete.
Opening claim text (preview).
What is claimed is: 1 . A method of electroplating metal, the method comprising: contacting a substrate with an electroplating solution having ions of a metal, wherein the substrate has features providing an open area of at least about 0.9% on a face of the substrate; applying an electrofill current waveform to the substrate contacting the electroplating solution, wherein the electrofill current waveform comprises (i) a pulse having a magnitude of at least about 2 times a magnitude of a baseline current for a duration of from about 10 to about 200 seconds, and (ii) a substantially constant current step having, on average, the magnitude of the baseline current, wherein the substantially constant current step follows the pulse; and filling at least a portion of the features with the metal.
the interconnections being through-semiconductor vias · CPC title
comprising use of blind vias during the manufacture · CPC title
characterised by the filling method or the material of the conductive fill · CPC title
for electroplating · CPC title
Electrolytic deposition, i.e. electroplating; Electroless plating · CPC title
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