Dynamic refresh rate switching system and method thereof

Patent metadata

Field	Value
Publication number	US-2025246110-A1
Application number	US-202519039302-A
Country	US
Kind code	A1
Filing date	Jan 28, 2025
Priority date	May 6, 2022
Publication date	Jul 31, 2025
Grant date	—

Abstract

Dynamic refresh rate (DRR) switching is used to dynamically update a refresh rate of content presented on an interface. When a first application and a second application are presented on a user interface at a first refresh rate; a request may be received to temporarily boost the first refresh rate to a second, higher, refresh rate. DRR switching is initiated as the first refresh rate is temporarily boosted to a second refresh rate. Applications that are opted in to the second refresh rate receive signals to refresh content at the second refresh rate, while applications that are not opted in to the second refresh rate receive signals to refresh content at a virtualized refresh rate that matches the first refresh rate. Thus, the first application refreshes content at the first refresh rate and the second application refreshes content at the second, higher refresh rate, providing a smooth user experience without unnecessarily utilizing power consumption.

First claim

1 . (canceled)

2 . A system comprising:
a processor; a first application and a second application, each of the first application and the second application executing at a first refresh rate; and a memory storing instructions that, when executed by the processor, causes the processor to:
determine to temporarily boost the first refresh rate to a second refresh rate, wherein the second refresh rate is higher than the first refresh rate,
transmit a first signal to the first application to refresh at the second refresh rate,
transmit a second signal to the second application to maintain refreshing at the first refresh rate based on a type of content shown by the second application, and
control the first application to refresh at the second refresh rate upon receipt of the first signal, and the second application to maintain refreshing at the first refresh rate upon receipt of the second signal.

3 . The system of claim 2 , wherein transmitting the second signal to the second application based on the type of content shown by the second application comprises transmitting the second signal to the second application based on a capability of the second application.

4 . The system of claim 2 , wherein transmitting the second signal to the second application based on the type of content shown by the second application comprises transmitting the second signal to the second application based the second application being unable to refresh at the second refresh rate.

5 . The system of claim 2 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: display the first application and the second application on at least one of the same user interface or the same display.

6 . The system of claim 2 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: maintain frame statistics for a previous frame and a next expected frame.

7 . The system of claim 2 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: maintain frame statistics comprising at least one of a last frame time, a current composition rate, a current time, a time frequency, or a next estimated frame time.

8 . The system of claim 2 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: utilize a frame statistic to return at least one of an estimated time, a composition rate, or a virtual synchronization count for a following frame.

9 . The system of claim 2 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: map a frame statistic to a clock.

10 . The system of claim 2 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: track a time for at least one of a previous frame or a next frame.

11 . The system of claim 2 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: map a frame statistic to at least one of a virtualized vblank or a non-virtualized vblank.

12 . A system comprising:
a processor; a first application and a second application, each of the first application and the second application executing at a first refresh rate; and a memory storing instructions that, when executed by the processor, causes the processor to:
determine to temporarily boost the first refresh rate to a second refresh rate, wherein the second refresh rate is higher than the first refresh rate,
transmit a first signal to the first application to refresh at the second refresh rate based on the first application being opted in to the second refresh rate,
transmit a second signal to the second application to maintain refreshing at the first refresh rate based on the second application being opted out of the second refresh rate, and
control the first application to refresh at the second refresh rate upon receipt of the first signal, and the second application to maintain refreshing at the first refresh rate upon receipt of the second signal.

13 . The system of claim 12 , wherein the first application has been opted in to the second refresh rate via a user selection.

14 . The system of claim 12 wherein the second application has been opted out of the second refresh rate via a user selection.

15 . The system of claim 12 , wherein the first application has been opted in to receive clock notifications at a higher frequency than the first refresh rate.

16 . The system of claim 12 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: display the first application and the second application on at least one of the same user interface or the same display.

17 . The system of claim 12 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: utilize a frame statistic to return at least one of an estimated time, a composition rate, or a virtual synchronization count for a following frame.

18 . The system of claim 12 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: map a frame statistic to a clock.

19 . The system of claim 12 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: track a time for at least one of a previous frame or a next frame.

20 . The system of claim 12 , wherein the memory further stores instructions that, when executed by the processor, cause the processor to: map a frame statistic to at least one of a virtualized vblank or a non-virtualized vblank.

21 . A system comprising:
a processor; a first application and a second application, each of the first application and the second application executing at a first refresh rate; and a memory storing instructions that, when executed by the processor, causes the processor to:
determine to temporarily boost the first refresh rate to a second refresh rate, wherein the second refresh rate is higher than the first refresh rate,
transmit a first signal to the first application to refresh at the second refresh rate based on the first application being capable of refreshing at the second refresh rate and being opted in to the second refresh rate,
transmit a second signal to the second application to maintain refreshing at the first refresh rate based on the second application being unable to refresh at the second refresh rate and being opted out of the second refresh rate, and
control the first application to refresh at the second refresh rate upon receipt of the first signal, and the second application to maintain refreshing at the first refresh rate upon receipt of the second signal.

Assignees

• Microsoft Technology Licensing Llc

Inventors

• Von Hippel Michael Paul Erich
• Amaral De Carvalho Ana Marta
• Parikh Hrushit Kamal
• Fink Reiner
• Pronovost Steve Michel
• Xu Zhigang
• Northrup Zachary Scott
• Blanco Leonardo E

Classifications

• G09G2340/0435

  Change or adaptation of the frame rate of the video stream · CPC title

• G09G2354/00

  Aspects of interface with display user · CPC title

• G09G5/14

  Display of multiple viewports · CPC title

• G06F3/1431

  using a single graphics controller · CPC title

• G09G2370/20

  Details of the management of multiple sources of image data · CPC title