Electronic device for adaptive scanning of image

US2025225957A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025225957-A1
Application numberUS-202519093616-A
CountryUS
Kind codeA1
Filing dateMar 28, 2025
Priority dateSep 30, 2022
Publication dateJul 10, 2025
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example electronic device may include at least one processor, a display driving circuit including a graphic random access memory (GRAM), and a display panel. The display driving circuit may be configured to change an image stored in the GRAM from a first image to a second image, the first image being provided within a first time period and the second image being provided within a second time period; display the second image based on a multi-scan of the second image within the second time period based on a time length between a start timing of a last scan of the first image and a start timing of a first scan of the second image being longer than or equal to a reference length; and, on the condition that the time length is shorter than the reference length, display the second image based on a single scan of the second image within the second time period.

First claim

Opening claim text (preview).

What is claimed is: 1 . An electronic device comprising: at least one processor comprising processing circuitry; display driver circuitry including a graphic random access memory (GRAM); and a display panel, wherein the display driver circuitry is configured to: change an image stored in the GRAM from a first image to a second image, the first image being provided from the at least one processor in a first time interval in response to a synchronization signal from the display driver circuitry and the second image being provided from the at least one processor in a second time interval subsequent to the first time interval in response to the synchronization signal; on a condition that a time length between a start timing of a last scanning of the first image stored in the GRAM executed in the first time interval and a start timing of an initial scanning of the second image stored in the GRAM is longer than or equal to a reference length, display, on the display panel, the second image, based on executing multiple scans of the second image stored in the GRAM in the second time interval; and on a condition that the time length is shorter than the reference length, display, on the display panel, the second image, based on executing a single scan of the second image stored in the GRAM in the second time interval. 2 . The electronic device of claim 1 , wherein the display panel includes sub-pixels each including a light emitting diode (LED) and a transistor for providing a current to the LED, wherein the multiple scans include a first scan and a second scan subsequent to the first scan, and wherein, on the condition that the time length is longer than or equal to the reference length, the second image is displayed based on applying a data voltage to a gate electrode of the transistor in accordance with the first scan and applying again the data voltage to the gate electrode of the transistor in accordance with the second scan, in the second time interval. 3 . The electronic device of claim 2 , wherein the display driver circuitry is configured to: initialize the gate electrode before the data voltage is applied in accordance with the first scan, and initialize the gate electrode again before the data voltage is applied again in accordance with the second scan. 4 . The electronic device of claim 2 , wherein the display driver circuitry is configured to: on the condition that the time length is shorter than the reference length, further based on providing, via the transistor, to the LED, the current before the gate electrode to which the data voltage is applied in accordance with the single scan is initialized, display the second image. 5 . The electronic device of claim 1 , wherein the display driver circuitry is configured to: on a condition that a frames per second (FPS) of a content provided through displaying of the first image and the second image is less than or equal to a reference value and the time length is longer than or equal to the reference length, display the second image, based on executing the multiple scans; and on a condition that the FPS is less than or equal to the reference value and the time length is shorter than the reference length, display the second image, based on executing the single scan. 6 . The electronic device of claim 5 , wherein the display driver circuitry is further configured to: on a condition that the FPS is greater than the reference value, independently of a relation between the time length and the reference length, display the second image, based on executing the single scan. 7 . The electronic device of claim 1 , wherein a content provided through displaying of the first image and the second image includes a high contrast area only having black color and white color. 8 . The electronic device of claim 1 , wherein a content provided through displaying of the first image and the second image includes a visual object having a shape changed in accordance with changing of image that comprises changing from the first image to the second image, and wherein a position of the visual object is maintained independently of the changing of image. 9 . The electronic device of claim 1 , wherein the reference length is identified based on an illuminance around the electronic device. 10 . The electronic device of claim 1 , wherein the reference length corresponds to a frames per second (FPS) of a content provided through displaying of the first image and the second image. 11 . The electronic device of claim 1 , wherein the display driver circuitry is further configured to: change the image stored in the GRAM from the second image to a third image provided from the at least one processor in a third time interval subsequent to the second time interval; on a condition that the time length is longer than or equal to the reference length corresponding to a frames per second (FPS) of a content provided through displaying of the first image, the second image, and the third image, display, on the display panel, the third image, based on executing a single scan of the third image stored in the GRAM in the third time interval; and on a condition that the time length is shorter than the reference length, display, on the display panel, the third image, based on executing multiple scans of the third image stored in the GRAM in the third time interval. 12 . The electronic device of claim 1 , wherein the time length is identified through a cycle of a vertical synchronization signal. 13 . The electronic device of claim 1 , wherein information regarding the reference length is provided from the at least one processor. 14 . The electronic device of claim 13 , wherein the display driver circuitry is configured to: compare the reference length with the time length; in response to the time length being longer than or equal to the reference length, display the second image, based on executing the multiple scans in the second time interval; and in response to the time length shorter than the reference length, display the second image, based on executing the single scan in the second time interval. 15 . An electronic device comprising: at least one processor comprising processing circuitry; display driver circuitry including a graphic random access memory (GRAM); and a display panel, wherein the display driver circuitry is configured to: change an image stored in the GRAM, from a first image to a second image, the first image being provided from the at least one processor in a first time interval in response to a synchronization signal from the display driver circuitry and the second image being provided from the at least one processor in a second time interval subsequent to the first time interval in response to the synchronization signal; on a condition that a single scan of the first image stored in the GRAM is executed within the first time interval for displaying of the first image, display, on the display panel, the second image, based on executing multiple scans of the second image stored in the GRAM within the second time interval; and on a condition that multiple scans of the first image stored in the GRAM are executed within the first time interval for displaying of the first image, display, on the display panel, the second image, based on executing a single scan of the second image stored in the GRAM within the second time interval. 16 . The electronic device of claim 15 , wherein the display driver circuitry is configured to: change the image stored in the GRAM from the second image to a third image provided from th

Assignees

Inventors

Classifications

  • with pixel circuitry controlling the current through the light-emitting element · CPC title

  • Reduction of after-image effects · CPC title

  • Power management, e.g. power saving · CPC title

  • for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

  • G09G5/39Primary

    Control of the bit-mapped memory · CPC title

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Frequently asked questions

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What does patent US2025225957A1 cover?
An example electronic device may include at least one processor, a display driving circuit including a graphic random access memory (GRAM), and a display panel. The display driving circuit may be configured to change an image stored in the GRAM from a first image to a second image, the first image being provided within a first time period and the second image being provided within a second time…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G5/39. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Jul 10 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).