Semiconductor device

Patent metadata

Field	Value
Publication number	US-2025210475-A1
Application number	US-202519076503-A
Country	US
Kind code	A1
Filing date	Mar 11, 2025
Priority date	Sep 14, 2022
Publication date	Jun 26, 2025
Grant date	—

Abstract

A semiconductor device includes a semiconductor element, a first lead including a die pad portion, the die pad portion including a first lead obverse surface facing a first side in a thickness direction and carrying the semiconductor element, a first lead reverse surface facing a second side in the thickness direction, and a first lead side surface facing a first side in a first direction; a second lead apart from the die pad portion toward the first side in the first direction; and a wire conductively bonded to the semiconductor element and the second lead. The die pad portion includes a contact avoidance surface connected to the first lead obverse surface and the first lead side surface. The contact avoidance surface overlaps with the wire as viewed in the thickness direction, and is located on the second side in the thickness direction with respect to the first lead obverse surface.

First claim

1 . A semiconductor device comprising:
a semiconductor element; a first lead including a die pad portion, the die pad portion having a first lead obverse surface facing a first side in a thickness direction and on which the semiconductor element is mounted, a first lead reverse surface facing a second side in the thickness direction, and a first lead side surface facing a first side in a first direction orthogonal to the thickness direction; a second lead arranged apart from the die pad portion toward the first side in the first direction; and a wire conductively bonded to the semiconductor element and the second lead, wherein the die pad portion is further provided with a contact avoidance surface connected to the first lead obverse surface and the first lead side surface, and the contact avoidance surface overlaps with the wire as viewed in the thickness direction, and is located on the second side in the thickness direction with respect to the first lead obverse surface.

2 . The semiconductor device according to claim 1 , wherein the contact avoidance surface is a curvature that is convex outwardly.

3 . The semiconductor device according to claim 1 , wherein the contact avoidance surface is a concave curvature.

4 . The semiconductor device according to claim 1 , wherein the contact avoidance surface is a plane inclined with respect to the first lead obverse surface and the first lead side surface.

5 . The semiconductor device according to claim 1 , wherein the contact avoidance surface includes a first surface connected to the first lead obverse surface and parallel to the first lead side surface, and a second surface connected to the first lead side surface and parallel to the first lead obverse surface.

6 . The semiconductor device according to claim 1 , wherein the contact avoidance surface is inside the die pad portion in a second direction orthogonal to the thickness direction and the first direction.

7 . The semiconductor device according to claim 1 , wherein the contact avoidance surface extends to a peripheral end of the die pad portion in a second direction orthogonal to the thickness direction and the first direction.

8 . The semiconductor device according to claim 1 , wherein the second lead is curved toward the first side in the thickness direction.

9 . The semiconductor device according to claim 1 , wherein in the first direction, a distance between the first lead side surface and a bonding position of the wire with the semiconductor element is equal to or more than one third of a dimension of the first lead obverse surface.

10 . The semiconductor device according to claim 1 , further comprising a sealing resin having a first resin surface and a second resin surface,
wherein the first resin surface faces the first side in the thickness direction, the second resin surface faces the second side in the thickness direction, and the sealing resin covers the semiconductor element and a part of the die pad portion, and wherein the first lead reverse surface is exposed from the second resin surface.

11 . The semiconductor device according to claim 10 , wherein a distance between the first resin surface and the first lead obverse surface is equal to or less than four times a diameter of the wire.

12 . The semiconductor device according to claim 10 ,
wherein the first lead further includes a first terminal portion, the first terminal portion is provided with a first section connected to the die pad portion, a second section located on the first side in the thickness direction with respect to the first section and used for arranging the semiconductor device, and a third section interposed between the first section and the second section, and the second section extends from the third section outwardly in a second direction orthogonal to the thickness direction and the first direction.

13 . The semiconductor device according to claim 12 ,
wherein the second lead is provided with a second pad portion and a second terminal portion connected to the second pad portion, the second terminal portion is provided with a fourth section connected to the second pad portion, a fifth section located on the first side in the thickness direction with respect to the fourth section and used for arranging the semiconductor device, and a sixth section interposed between the fourth section and the fifth section, and the sealing resin further has a third resin surface facing the first side in the first direction and a fourth resin surface facing a second side in the first direction.

14 . The semiconductor device according to claim 13 ,
wherein the first section penetrates the third resin surface and is separated from the second resin surface in the thickness direction, and the fourth section penetrates the fourth resin surface and is separated from the second resin surface in the thickness direction.

15 . The semiconductor device according to claim 13 ,
wherein the second section and the fifth section are located on the second side in the thickness direction with respect to the first resin surface.

16 . The semiconductor device according to claim 13 ,
wherein the second pad portion has a second lead obverse surface facing the first side in the thickness direction, and a surface of the first section on the first side in the thickness direction, the first lead obverse surface, a surface of the fourth section on the first side in the thickness direction and the second lead obverse surface are at a same position in the thickness direction.

Assignees

• Rohm Co Ltd

Inventors

• KAKIZAKI Ryotaro
• Saito Koshun

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W72/534

  being rectangular · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title

• H10W70/417 Primary

  Bonding materials between chips and die pads · CPC title