Ordering nodes for tensor network contraction based quantum computing simulation

Patent metadata

Field	Value
Publication number	US-2025190841-A1
Application number	US-202519055021-A
Country	US
Kind code	A1
Filing date	Feb 17, 2025
Priority date	Aug 17, 2022
Publication date	Jun 12, 2025
Grant date	—

Abstract

A classical computer includes a classical processor and a classical memory coupled to the classical processor. The classical memory includes a gate-graph conversion array, which itself includes at least one correspondence between a conversion quantum gate and a conversion graphical representation. The classical memory further includes classical programming in the classical memory. Execution of the classical programming configures the classical computer to perform the following functions. Receive a plurality of quantum circuit input files, where each quantum circuit input file includes a quantum circuit comprising an input quantum gate. Convert each quantum circuit into a tensor graph by utilizing the gate-graph conversion array. Evaluate the tensor graph as a contraction tree. Output a selected quantum circuit input file of the plurality of quantum circuit input files, with a potential to demonstrate quantum advantage over one or more non-selected quantum circuit input files of the plurality of quantum circuit input files.

First claim

What is claimed is:

1 . A classical computer, comprising:
a classical processor; a classical memory, coupled to the classical processor; a gate-graph conversion array stored in the classical memory, the conversion array including at least one correspondence between a conversion quantum gate and a conversion graphical representation; and classical programming in the classical memory constituting machine readable instructions that when executed by the classical processor causes the classical processor to configure the classical computer to perform functions, including:
receiving a plurality of quantum circuit input files, each quantum circuit input file including a quantum circuit comprising at least one input quantum gate;
converting each quantum circuit into a tensor graph utilizing the gate- graph conversion array;
evaluating the tensor graph as a contraction tree; and
outputting a selected quantum circuit input file of the plurality of quantum circuit input files with a potential to demonstrate quantum advantage over one or more non-selected quantum circuit input files of the plurality of quantum circuit input files.

2 . The classical computer of claim 1 , further comprising:
a quantum processing unit fabricator connected to the computer processor, the quantum processing unit fabricator configured to fabricate one or more quantum processing units conforming to the selected quantum circuit input file; wherein execution of the classical programming by the classical processor causes the quantum processing unit fabricator to fabricate a quantum processing unit conforming to the selected quantum circuit input file.

3 . The classical computer of claim 1 , wherein the tensor graph includes at least two tensors and at least one index.

4 . The classical computer of claim 3 , wherein evaluating the tensor graph further comprises functions to:
select indexed tensors of the at least two tensors associated with a first index of the at least one index; contract the tensor graph over the first index by summing the product of the indexed tensors as a resulting tensor; and add the resulting tensor to the tensor graph.

5 . The classical computer of claim 4 , wherein evaluating the tensor graph further comprises functions to order the at least two tensors from a minimum rank of a tensor to a maximum rank of a tensor.

6 . The classical computer of claim 5 , wherein ordering the at least two tensors includes ordering to provide the maximum rank of a tensor as a smallest maximum rank of a tensor.

7 . The classical computer of claim 3 , wherein evaluating the tensor graph further comprises functions to:
identify a quality contraction tree; and contract the tensor graph based upon the contraction tree.

8 . The classical computer of claim 7 , wherein:
identifying the quality contraction tree includes:
constructing a preliminary contraction tree;
selecting a labeling of the leaves of the preliminary contraction tree; and
optimizing the preliminary contraction tree based on the labeling of the leaves; and
the optimized preliminary contraction tree is the identified quality contraction tree.

9 . The classical computer of claim 8 , wherein optimizing the preliminary contraction tree includes:
computing a minimal possible edge congestion for the preliminary contraction tree; computing a minimal vertex congestion for the preliminary contraction tree; computing a minimum possible number of Floating Point Operations per Second (FLOPs) for the preliminary contraction tree.

10 . The classical computer of claim 7 , wherein contracting the tensor graph based on the contraction tree includes:
selecting an order of contraction which minimizes the sum total of lengths of stretched edges in the tensor graph.

11 . The classical computer of claim 1 , wherein:
the classical memory further includes an optimization problem file with a solution; and execution of the classical programming by the classical processor configures the classical computer to perform functions, including functions to: simulate a benchmark processor; simulate a quantum processing unit conforming to the quantum circuit of the selected quantum circuit input file; simulate providing the quantum processing unit the optimization problem file; and simulate providing the benchmark processor the optimization problem file; and the simulated quantum processing unit locates the solution in a first period of time; the simulated benchmark processor locates the solution in a second period of time; and the first period of time is shorter than the second period of time.

12 . A computing system, comprising:
a classical processor; a classical memory, coupled to the classical processor; a gate-graph conversion array in the classical memory, including at least one correspondence between a conversion quantum gate and a conversion graphical representation; a quantum processing unit fabricator, configured to fabricate one or more quantum processing units conforming to a respective quantum circuit; and classical programming in the classical memory, wherein execution of the classical programming by the classical processor configures the computing system to perform functions, including functions to:
receive a plurality of quantum circuit input files, each quantum circuit input file including a quantum circuit comprising at least one input quantum gate;
convert each quantum circuit of the quantum circuit input files into a tensor graph utilizing the gate-graph conversion array;
evaluate the tensor graph as a contraction tree;
output a selected quantum circuit input file of the plurality of quantum circuit input files with a potential to demonstrate quantum advantage over one or more non-selected quantum circuit input files of the plurality of quantum circuit input files; and
cause the quantum processing unit fabricator to fabricate a quantum processing unit conforming to the selected quantum circuit input file.

13 . The computing system of claim 12 , further comprising:
a benchmark processor; and an optimization problem file with a solution;
wherein:
the quantum processing unit is provided the optimization problem file;
the quantum processing unit locates the solution in a first period of time;
the benchmark processor is provided the optimization problem file;
the benchmark processor locates the solution in a second period of time; and
the first period of time is shorter than the second period of time.

14 . The computing system of claim 12 , wherein the tensor graph includes at least two tensors and at least one index.

15 . The computing system of claim 14 , wherein evaluating the tensor graph further comprises functions to:
select indexed tensors of the at least two tensors associated with a first index of the at least one index; contract the tensor graph over the first index by summing the product of the indexed tensors as a resulting tensor; and add the resulting tensor to the tensor graph.

16 . The computing system of claim 12 , wherein the quantum circuit of the quantum circuit input file comprises at least one hundred input quantum gates.

17 . A computer readable storage medium having data stored therein representing software executable by a computer, the software including instructions to:
receive a plurality of quantum circuit input files, each quantum circuit input file including a quantum circuit comprising at least one input quantum gate; convert each quantum circuit into a tensor graph utilizing the gate-graph conversion array;

Assignees

• Univ Delaware
• Argonne Nat Laboratory

Inventors

• Safro Ilya
• Ibrahim Cameron
• Alexeev Yuri
• Lykov Danil

Classifications

• G06N10/80 Primary

  Quantum programming, e.g. interfaces, languages or software-development kits for creating or handling programs capable of running on quantum computers; Platforms for simulating or accessing quantum computers, e.g. cloud-based quantum computing · CPC title

• G06N5/01

  Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound · CPC title

• G06N10/60

  Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms · CPC title

• G06N10/20 Primary

  Models of quantum computing, e.g. quantum circuits or universal quantum computers · CPC title