Semiconductor structure inspection method, extreme ultraviolet (euv) mask inspection method, and euv lithography method

Patent metadata

Field	Value
Publication number	US-2025164872-A1
Application number	US-202418774118-A
Country	US
Kind code	A1
Filing date	Jul 16, 2024
Priority date	Nov 20, 2023
Publication date	May 22, 2025
Grant date	—

Abstract

A semiconductor structure inspection method includes obtaining an image of a semiconductor structure, the semiconductor structure including a wafer, a semiconductor layer, and an inspection pattern, determining a material of an insertion layer to be inserted in the semiconductor structure, determining a thickness of the insertion layer, inserting the insertion layer having the determined material and the determined thickness in the semiconductor structure, and measuring the semiconductor structure having the insertion layer inserted therein.

First claim

What is claimed is:

1 . A semiconductor structure inspection method comprising:
obtaining an image of a semiconductor structure, the semiconductor structure comprising a wafer, a semiconductor layer, and an inspection pattern; determining a material of an insertion layer to be inserted in the semiconductor structure; determining a thickness of the insertion layer; inserting the insertion layer having the determined material and the determined thickness in the semiconductor structure; and measuring the semiconductor structure having the insertion layer inserted therein.

2 . The semiconductor structure inspection method of claim 1 , wherein the obtaining of the image of the semiconductor structure comprises measuring the inspection pattern.

3 . The semiconductor structure inspection method of claim 1 , wherein the determining of the material of the insertion layer comprises determining the material of the insertion layer based on a refractive index and an absorption coefficient of the insertion layer.

4 . The semiconductor structure inspection method of claim 1 , wherein the determining of the thickness of the insertion layer comprises:
obtaining a plurality of patch images at a plurality of wavelengths; combining the plurality of patch images; and determining a signal-to-noise ratio (SNR) corresponding to the combined plurality of patch images.

5 . The semiconductor structure inspection method of claim 4 , wherein the combining of the plurality of patch images comprises combining the obtained plurality of patch images by assigning weights to the respective light intensities of the plurality of patch images.

6 . The semiconductor structure inspection method of claim 4 , wherein the determining of the SNR is performed by:
dividing a difference image into a first region having a first difference in light intensity and a second region having a second difference in light intensity that is less than the first difference in light intensity; and comparing a value of light intensity of the first region relative to a value of light intensity of the second region, wherein the difference image is an image corresponding to a difference between a defect image and a normal image, wherein the defect image is a combined patch image comprising at least one defect, and wherein the normal image is a combined patch image that does not comprise a defect.

7 . The semiconductor structure inspection method of claim 1 , wherein a wavelength band for measuring the semiconductor structure is selected based on a location corresponding to a placement of the inspection pattern, a size of the inspection pattern, and a surrounding material adjacent to the inspection pattern.

8 . An extreme ultraviolet (EUV) mask inspection method comprising:
forming a photoresist layer on a wafer and a semiconductor layer of a semiconductor structure; forming a photoresist pattern by exposing the photoresist layer using an EUV mask; obtaining an image of the photoresist pattern; determining a material of an insertion layer to be inserted in the semiconductor structure; determining a thickness of the insertion layer; inserting the insertion layer in the semiconductor structure; and determining whether the EUV mask is defective by measuring the photoresist pattern with the insertion layer having the determined material and the determined thickness inserted in the semiconductor structure.

9 . The EUV mask inspection method of claim 8 , wherein the obtaining of the image of the photoresist pattern comprises measuring dimensions of the photoresist pattern.

10 . The EUV mask inspection method of claim 8 , wherein the determining of the material of the insertion layer is performed by measuring, by a measurement device, the insertion layer while the insertion layer is inserted in the semiconductor structure.

11 . The EUV mask inspection method of claim 8 , wherein the determining of the thickness of the insertion layer comprises obtaining a plurality of patch images by performing a simulation for a plurality of wavelengths, with the insertion layer inserted between the wafer and the photoresist pattern.

12 . The EUV mask inspection method of claim 8 , wherein the determining of the thickness of the insertion layer comprises:
combining the plurality of patch images; and determining a signal-to-noise ratio (SNR) of each of combined patch images, wherein the determining of the SNR is performed by:
dividing a difference image into a first region having a first difference in light intensity and a second region having a second difference in light intensity that is less than the first difference in light intensity; and
comparing, for each of the combined patch images, a maximum light intensity of the first region to a maximum light intensity of the second region, and
wherein the difference image is an image corresponding to a difference between a defect image and a normal image, wherein the defect image is a combined patch image comprising at least one defect, and wherein the normal image is a combined patch image that does not comprise a defect.

13 . The EUV mask inspection method of claim 8 , wherein the insertion layer comprises at least one of silicon nitride (SiN), silicon oxynitride (SiON), titanium nitride (TiN), tungsten (W), gold (Au), photoresist PR, silicon oxycarbide (SiOC), and silicon carbide (SiC).

14 . The EUV mask inspection method of claim 8 , wherein the insertion layer is between the semiconductor layer and the photoresist pattern.

15 . The EUV mask inspection method of claim 8 , wherein the thickness of the insertion layer is in a range of about 1 nanometer (nm) to about 200 nm.

16 . The EUV mask inspection method of claim 8 , wherein the obtaining of the image of the photoresist pattern is performed by a transmission electron microscope (TEM),
wherein the determining of the material of the insertion layer is performed by a spectroscopic ellipsometer, and wherein the measuring of the photoresist pattern with the insertion layer inserted in the semiconductor structure is performed by an optical microscope.

17 . An extreme ultraviolet (EUV) lithography method comprising:
providing a semiconductor layer on a wafer; providing a photoresist layer on the wafer; exposing the photoresist layer on the wafer using an EUV mask; forming a photoresist pattern by developing the exposed photoresist layer; and determining whether the EUV mask is defective by inspecting the photoresist pattern, wherein the inspecting of the photoresist pattern comprises:
obtaining an image of the photoresist pattern;
determining a material of an insertion layer to be inserted in a semiconductor structure, the semiconductor structure comprising the semiconductor layer, the wafer, and the photoresist layer;
determining a thickness of the insertion layer;
inserting the insertion layer having the determined material and the determined thickness into the semiconductor structure; and
measuring the photoresist pattern while the insertion layer is inserted in the semiconductor structure.

18 . The EUV lithography method of claim 17 , wherein the material of the insertion layer is determined based on a refractive index and an absorption coefficient of the insertion layer, and
wherein the thickness of the insertion layer is determined based on a signal-to-noise ratio (SNR).

19 . The EUV lithography method of claim 17 , further comprising, when the EUV mask is determined to be defective, removing the photoresist pattern.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Park Jiho
• Kim Hun
• Park Sora
• Yoo Hyungkeun
• Kwon Younghun
• Kim Jongchul
• Yang Jaeyoung
• Lee Chihoon

Classifications

• G06T7/60

  Analysis of geometric attributes · CPC title

• G06T2207/20212

  Image combination · CPC title

• G06T7/0004

  Industrial image inspection · CPC title

• G06T2207/30148

  Semiconductor; IC; Wafer · CPC title

• G03F1/84 Primary

  Inspecting · CPC title