Microelectronic assemblies having topside power delivery structures

Patent metadata

Field	Value
Publication number	US-2025132259-A1
Application number	US-202418989232-A
Country	US
Kind code	A1
Filing date	Dec 20, 2024
Priority date	Jun 23, 2021
Publication date	Apr 24, 2025
Grant date	—

Abstract

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source; a first microelectronic component, having an active side electrically coupled to the surface of the package substrate and an opposing back side, surrounded by an insulating material; a second microelectronic component, having an active side electrically coupled to the surface of the package substrate and an opposing back side, surrounded by the insulating material and including a through-substrate via (TSV) electrically coupled to the first conductive pathway; and a redistribution layer (RDL), on the insulating material, including a second conductive pathway electrically coupling the TSV, the second surface of the second microelectronic component, and the second surface of the first microelectronic component.

First claim

1 . A microelectronic assembly, comprising:
a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source; an insulating material, on the surface of the package substrate; a first microelectronic component, surrounded by the insulating material, including a through-substrate via (TSV) electrically coupled to the first conductive pathway, and having a first surface electrically coupled to the surface of the package substrate and an opposing second surface, wherein the first surface of the first microelectronic component is a backside and the second surface of the first microelectronic component is an active side; a second microelectronic component, having a first surface electrically coupled to the surface of the package substrate and an opposing second surface, surrounded by the insulating material, wherein the first surface of the second microelectronic component is a backside and the second surface of the second microelectronic component is an active side; and a redistribution layer (RDL), on the insulating material, including a second conductive pathway electrically coupling the TSV, the second surface of the second microelectronic component, and the second surface of the first microelectronic component.

2 . The microelectronic assembly of claim 1 , wherein the TSV is a first TSV, and further comprising:
a second TSV in the second microelectronic component electrically coupled to the first conductive pathway in the package substrate and to the second conductive pathway in the RDL.

3 . The microelectronic assembly of claim 1 , wherein the insulating material is a first insulating material, and further comprising:
a capacitive element embedded in a second insulating material between the package substrate and the first insulating material and electrically coupled to the first conductive pathway and the TSV.

4 . The microelectronic assembly of claim 1 , wherein the RDL has a first surface and an opposing second surface and the insulating material is at the first surface of the RDL, and further comprising:
an inductor at the second surface of the RDL and electrically coupled to the second conductive pathway.

5 . The microelectronic assembly of claim 4 , further comprising:
a capacitive element between the inductor and the second surface of the RDL, wherein the capacitive element is electrically coupled to the inductor and to the second conductive pathway.

6 . The microelectronic assembly of claim 1 , wherein the surface of the package substrate is a second surface and the package substrate further includes an opposing first surface, and further comprising:
a circuit board electrically coupled to the first surface of the package substrate, wherein the power source is on the circuit board.

7 . The microelectronic assembly of claim 6 , further comprising:
a capacitive element at the first surface of the package substrate and electrically coupled to the first conductive pathway.

8 . The microelectronic assembly of claim 1 , further comprising:
a heat transfer structure on the RDL.

9 . The microelectronic assembly of claim 1 , wherein the first microelectronic component is a central processing unit, a graphics processing unit, a digital signal processor, an application specific integrated circuit, a server processor, or a crypto processor.

10 . The microelectronic assembly of claim 1 , wherein the second microelectronic component is a voltage regulator configured to convert a low current high voltage signal to a low voltage high current signal.

11 . A microelectronic assembly, comprising:
a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source; a first microelectronic component, having a first surface electrically coupled to the surface of the package substrate and an opposing second surface, the first microelectronic component surrounded by an insulating material on the surface of the package substrate, wherein the first surface of the first microelectronic component is an active side and the second surface of the first microelectronic component is a backside; a second microelectronic component, having a first surface electrically coupled to the surface of the package substrate and an opposing second surface, the second microelectronic component surrounded by the insulating material and including a through-substrate via (TSV) electrically coupled to the first conductive pathway, wherein the first surface of the second microelectronic component is an active side and the second surface of the second microelectronic component is a backside; and a redistribution layer (RDL), on the insulating material, including a second conductive pathway electrically coupling the TSV, the second surface of the second microelectronic component, and the second surface of the first microelectronic component.

12 . The microelectronic assembly of claim 11 , wherein the surface of the package substrate is a second surface and the package substrate further includes an opposing first surface, and further comprising:
a circuit board electrically coupled to the first surface of the package substrate, wherein the power source is on the circuit board.

13 . The microelectronic assembly of claim 11 , further comprising:
a heat transfer structure at the second surface of the RDL.

14 . The microelectronic assembly of claim 11 , wherein the first microelectronic component is a central processing unit, a graphics processing unit, a digital signal processor, an application specific integrated circuit, a server processor, or a crypto processor.

15 . The microelectronic assembly of claim 11 , wherein the second microelectronic component is a voltage regulator.

16 . A microelectronic assembly, comprising:
a package substrate, having a surface, including a first conductive pathway configured to be electrically coupled to a power source; an insulating material on the package substrate; a first microelectronic component, having a first surface at the package substrate and an opposing second surface, embedded in the insulating material and including a first through-substrate via (TSV) electrically coupled to the first conductive pathway, wherein the first surface of the first microelectronic component is a backside and the second surface of the first microelectronic component is an active side; a second microelectronic component, having a first surface electrically coupled to the surface of the package substrate and an opposing second surface, the second microelectronic component surrounded by the insulating material and including a second through-substrate via (TSV) electrically coupled to the first conductive pathway, wherein the first surface of the second microelectronic component is an active side and the second surface of the second microelectronic component is a backside; and a redistribution layer (RDL), on the insulating material, including a second conductive pathway electrically coupling the first TSV, the second TSV, the second surface of the second microelectronic component, and the second surface of the first microelectronic component.

17 . The microelectronic assembly of claim 16 , wherein the first microelectronic component is a central processing unit, a graphics processing unit, a digital signal processor, an application specific integrated circuit, a server processor, or a crypto processor.

18 . The microelectronic assembly of claim 16 , wherein the second microelectronic component is a voltage regulator.

19 .

Assignees

• Intel Corp

Inventors

• Waidhas Bernd
• Hanna Carlton
• Morein Stephen
• Keser Lizabeth
• Seidemann Georg

Classifications

• H10W90/401

  characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

• H10W72/00

  Interconnections or connectors in packages · CPC title

• H10W70/65

  Shapes or dispositions of interconnections · CPC title

• H10W20/497

  Inductive arrangements or effects of, or between, wiring layers · CPC title

• H10W20/495

  Capacitive arrangements or effects of, or between wiring layers · CPC title