Ramp generation circuit, image sensing device including the ramp generation circuit, and method for operating the image sensing device

Patent metadata

Field	Value
Publication number	US-2025088774-A1
Application number	US-202418818613-A
Country	US
Kind code	A1
Filing date	Aug 29, 2024
Priority date	Sep 8, 2023
Publication date	Mar 13, 2025
Grant date	—

Abstract

A ramp generation circuit includes a ramping voltage generator configured to generate a ramping voltage that changes depending on a first slope or a second slope, a blocking capacitor configured to transmit the ramping voltage to a transfer node, a signal output unit configured to amplify a voltage of the transfer node and to output a ramp output signal to an output node, and a ramp switch configured to selectively connect the transfer node to the output node.

First claim

What is claimed is:

1 . A ramp generation circuit comprising:
a ramping voltage generator configured to generate a ramping voltage that changes according to a first slope or a second slope; a blocking capacitor configured to transmit the ramping voltage to a transfer node; a signal output unit configured to amplify a voltage of the transfer node to output a ramp output signal to an output node; and a ramp switch configured to selectively connect the transfer node to the output node.

2 . The ramp generation circuit according to claim 1 , wherein the first slope is greater than the second slope.

3 . The ramp generation circuit according to claim 1 , wherein the ramping voltage generator includes:
a plurality of current transistors connected in parallel between a power-supply terminal and a generation node, at which the ramping voltage generator generates the ramping voltage; and a variable load resistor connected between the generation node and a ground terminal and having a variable resistance value.

4 . The ramp generation circuit according to claim 3 , wherein the blocking capacitor is connected to the generation node and the transfer node.

5 . The ramp generation circuit according to claim 1 , wherein the blocking capacitor selectively transmits an alternating current (AC) component of the ramping voltage to the transfer node.

6 . The ramp generation circuit according to claim 1 , wherein the blocking capacitor transfers the ramping voltage to the transfer node such that a voltage of the transfer node is independent of a direct current (DC) component of the ramping voltage.

7 . The ramp generation circuit according to claim 1 , wherein the signal output unit includes a source follower transistor, a gate of which is connected to the transfer node and a source of which is connected to the output node.

8 . The ramp generation circuit according to claim 7 , wherein a drain of the source follower transistor is connected to a ground terminal.

9 . The ramp generation circuit according to claim 1 , wherein the ramp switch selectively connects the transfer node to the output node in response to a ramp auto-zeroing signal, which has a logic high level before a slope of the ramp output signal changes between the first and second slopes.

10 . The ramp generation circuit according to claim 1 , wherein:
the signal output unit is further configured to generate, based on the ramping voltage, the ramp output signal changing according to one of the first and second slopes, and the signal output unit outputs the ramp output signal through a single path.

11 . An image sensing device comprising:
a ramp generation circuit including: a ramp source follower transistor configured to output a ramp output signal to an output node by amplifying a voltage of a transfer node, to which a ramping voltage changes according to a first slope or a second slope is applied; and a ramp switch configured to selectively connect the transfer node to the output node; and an analog-to-digital converter (ADC) configured to generate image data by comparing the ramp output signal with a pixel signal output from a pixel configured to sense an incident light.

12 . The image sensing device according to claim 11 , wherein the ADC includes:
a comparator configured to generate comparison data by comparing the ramp output signal with the pixel signal; a first switch configured to selectively connect a non-inverting input terminal of the comparator to an inverting output terminal of the comparator; a second switch configured to selectively connect an inverting input terminal of the comparator to a non-inverting output terminal of the comparator; and a counter configured to generate the image data by counting the comparison data.

13 . The image sensing device according to claim 12 , wherein the first and second switches are further configured to adjust voltage levels of the non-inverting and inverting input terminals, respectively, for the comparator to compare the ramp output signal with the pixel signal.

14 . The image sensing device according to claim 12 , wherein the ADC further includes:
a first input capacitor connected between the output node and the non-inverting input terminal; and a second input capacitor connected between the output node and the inverting input terminal.

15 . The image sensing device according to claim 11 , wherein the ramp switch selectively connects the transfer node to the output node in response to a ramp auto-zeroing signal, which has a logic high level before a slope of the ramp output signal changes between the first and second slopes.

16 . The image sensing device according to claim 11 , wherein:
the ramp source follower transistor is further configured to generate, based on the ramping voltage, the ramp output signal changing according to one of the first and second slopes, and the ramp source follower transistor outputs the ramp output signal through a single path.

17 . A method for operating an image sensing device, the method comprising:
generating first image data by comparing a ramp output signal, which changes according to a first slope, with a pixel signal output from a pixel configured to sense an incident light; electrically connecting an output node, through which the ramp output signal is output, to a gate of a ramp source follower transistor configured to generate the ramp output signal; and generating second image data by comparing the ramp output signal, which changes according to a second slope different from the first slope, with the pixel signal.

18 . The method according to claim 17 , wherein the first slope is greater than the second slope when the pixel signal is a reference signal generated in a state that a sensing node of the pixel is reset.

19 . The method according to claim 17 , wherein the first slope is less than the second slope when the pixel signal is an image signal generated in a state that photocharges generated by the pixel are accumulated in a sensing node of the pixel.

20 . The method according to claim 17 , further comprising setting, after the electrically connecting, a voltage level of the ramp output signal to be higher than a voltage level of the pixel signal.

Assignees

• Sk Hynix Inc

Inventors

• Park Han Sol
• Kim Shin Hoo
• Park Yu Jin

Classifications

• H04N25/60

  Noise processing, e.g. detecting, correcting, reducing or removing noise · CPC title

• H04N25/78 Primary

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H04N25/57

  Control of the dynamic range · CPC title

• H04N25/70

  SSIS architectures; Circuits associated therewith · CPC title

• H03M1/56 Primary

  Input signal compared with linear ramp · CPC title