Real-time snoop status

Patent metadata

Field	Value
Publication number	US-2025077430-A1
Application number	US-202318456693-A
Country	US
Kind code	A1
Filing date	Aug 28, 2023
Priority date	Aug 28, 2023
Publication date	Mar 6, 2025
Grant date	—

Abstract

Techniques and apparatus for performing real-time tracking and reporting of snoop activity within a data processing system are described. An example technique includes performing a local snoop operation for multiple processors within a cluster. A snoop tracing message with information associated with the local snoop operation is generated upon determining that the local snoop operation is successful. The snoop tracing message is transmitted to a storage device. Another example technique includes determining a location in memory of a computing system where a fetch request resolves. Information indicating the location in memory of the computing system where the fetch request resolves is encoded within a fetch response. The fetch response is transmitted to a processor. One or more counters within the processor that are used to track snoop activity are incremented based on the encoded information.

First claim

What is claimed is:

1 . A computer-implemented method comprising:
performing a local snoop operation for a plurality of processors within a cluster in response to receiving a fetch request; upon determining that the local snoop operation is successful, generating a snoop tracing message comprising information associated with the local snoop operation; and transmitting the snoop tracing message to a storage device.

2 . The computer-implemented method of claim 1 , wherein the information comprises at least one of (i) an indication of which processor of the plurality of processors had a cache line indicated in the fetch request, (ii) an address of the cache line, (iii) a state of the cache line according to a cache coherency protocol, or (iv) metadata associated with the local snoop operation.

3 . The computer-implemented method of claim 1 , wherein the snoop tracing message is transmitted to the storage device via a fetch request channel or a store request channel.

4 . The computer-implemented method of claim 1 , wherein the snoop tracing message is transmitted to the storage device via a bus dedicated for sending snoop tracing messages.

5 . The computer-implemented method of claim 1 , wherein the storage device comprises one or more partitions of memory dedicated for storing information from snoop tracing messages.

6 . The computer-implemented method of claim 1 , wherein performing the local snoop operation comprises:
sending, in response to a trigger message, a snoop request to each processor of the plurality of processors; and receiving, from each processor of the plurality of processors in response to the snoop request sent to the processor, a snoop response indicating whether the processor has a cache line indicated in the fetch request.

7 . The computer-implemented method of claim 6 , wherein determining that the local snoop operation is successful comprises determining that a processor of the plurality of processors has the cache line indicated in the fetch request.

8 . A computer-implemented method comprising:
receiving a fetch request from a first processor of a plurality of processors in a first cluster of a plurality of clusters within a computing system; determining a location in memory of the computing system where the fetch request resolves; encoding information within a fetch response, wherein the encoded information indicates at least the location in memory of the computing system where the fetch request resolves; and transmitting the fetch response comprising the encoded information to the first processor.

9 . The computer-implemented method of claim 8 , further comprising:
triggering a local snoop operation for the plurality of processors in the first cluster in response to receiving the fetch request; and upon determining that the local snoop operation is successful, generating the fetch response, wherein the fetch response further comprises a cache line indicated in the fetch request.

10 . The computer-implemented method of claim 9 , wherein the location in memory is a second processor of the plurality of processors in the first cluster.

11 . The computer-implemented method of claim 9 , wherein determining that the local snoop operation is successful comprises determining that a second processor of the plurality of processors in the first cluster has the cache line.

12 . The computer-implemented method of claim 8 , further comprising:
triggering a local snoop operation for the plurality of processors in the first cluster in response to receiving the fetch request; and upon determining that the local snoop operation is unsuccessful:
forwarding the fetch request to a first upper level cache associated with the first cluster; and
receiving the fetch response from the first upper level cache, wherein the fetch response further comprises a cache line indicated in the fetch request.

13 . The computer-implemented method of claim 12 , wherein the location in memory is a second cluster of the plurality of clusters.

14 . The computer-implemented method of claim 12 , wherein the location in memory is a second upper level cache associated with a second cluster.

15 . The computer-implemented method of claim 12 , wherein the location in memory is main memory of the computing system.

16 . The computer-implemented method of claim 12 , wherein determining that the local snoop operation is unsuccessful comprises determining that none of the plurality of processors in the first cluster has the cache line.

17 . The computer-implemented method of claim 8 , wherein one or more counters associated with the first processor are incremented based on the encoded information in the fetch response.

18 . A computer-implemented method comprising:
transmitting, from a processor in a first cluster of a plurality of clusters in a computing system, a fetch request for a cache line; receiving, in response to the fetch request, a fetch response comprising (i) the cache line and (ii) encoded snoop activity information; decoding the fetch response to obtain decoded snoop activity information; and incrementing one or more counters in the processor based on the decoded snoop activity information, wherein each of the one or more counters tracks a number of times that a fetch resolved in a different location in memory of the computing system.

19 . The computer-implemented method of claim 18 , wherein the decoded snoop activity information indicates a location in memory where the fetch request resolved.

20 . The computer-implemented method of claim 19 , wherein the location in memory indicated by the decoded snoop activity information is (i) another processor in the first cluster, (ii) a second cluster of the plurality of clusters, (iii) an upper level cache associated with the first cluster, (iv) an upper level cache associated with a second cluster of the plurality of clusters, or (v) main memory of the computing system.

Assignees

• IBM

Inventors

• Rider Scot
• Bronson Timothy
• Bubb Clinton E
• Walters Craig R

Classifications

• G06F12/0831 Primary

  using a bus scheme, e.g. with bus monitoring or watching means · CPC title

• G06F12/0897

  with two or more cache hierarchy levels (with multilevel cache hierarchies G06F12/0811) · CPC title

• G06F12/0811

  with multilevel cache hierarchies · CPC title

• G06F2212/1024

  Latency reduction · CPC title

• G06F13/1668

  Details of memory controller · CPC title