Sigma delta modulator, integrated circuit and method therefor
US-2021126648-A1 · Apr 29, 2021 · US
Delta sigma modulation circuit, digital transmission circuit, and digital transmitter
US2025030437A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2025030437-A1 |
| Application number | US-202418904166-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 2, 2024 |
| Priority date | May 20, 2022 |
| Publication date | Jan 23, 2025 |
| Grant date | — |
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Abstract
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Disclosed is a circuit including: a loop filter to perform digital processing on a signal inputted from an outside; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on the basis of the signal after the digital processing by the loop filter; and an averaging circuit to calculate the average of the values shown by the signals outputted by the quantizers, and to feed back the average to the loop filter, in which the thresholds used by the quantizers differ from one another.
First claim
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1 . A delta sigma modulation circuit comprising: a loop filter to perform digital processing on a signal inputted from an outside; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on a basis of the signal after the digital processing by the loop filter; and an averaging circuit to calculate an average of the signals respectively outputted by the quantizers, and to feed back the average to the loop filter, wherein the thresholds used by the quantizers differ from one another. 2 . A digital transmission circuit comprising: a loop filter to perform digital processing on a signal inputted from an outside; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on a basis of the signal after the digital processing by the loop filter; an averaging circuit to calculate an average of the signals respectively outputted by the quantizers, and to feed back the average to the loop filter; and a combining circuit to combine amplitudes of the signals outputted by the quantizers, wherein the thresholds used by the quantizers differ from one another. 3 . A digital transmitter comprising: a modem to generate a signal which is a transmission object; a loop filter to perform digital processing on the signal generated by the modem; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on a basis of the signal after the digital processing by the loop filter; an averaging circuit to calculate an average of the signals respectively outputted by the quantizers, and to feed back the average to the loop filter; a combining circuit to combine amplitudes of the signals outputted by the quantizers; an amplifier to amplify power of a signal after the combining by the combining circuit; and an antenna to emit the signal after the amplification by the amplifier, as an electric wave, into space, wherein the thresholds used by the quantizers differ from one another. 4 . The digital transmitter according to claim 3 , wherein the combining circuit includes an analog passive circuit. 5 . The delta sigma modulation circuit according to claim 1 , wherein the thresholds used by the quantizers are set to equally spaced values. 6 . The digital transmission circuit according to claim 2 , wherein the thresholds used by the quantizers are set to equally spaced values. 7 . The digital transmitter according to claim 3 , wherein the thresholds used by the quantizers are set to equally spaced values.
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Classifications
Digital delta-sigma modulation · CPC title
Details of the final digital/analogue conversion following the digital delta-sigma modulation · CPC title
Circuits · CPC title
characterised by the order of the loop filter, e.g. error feedback type · CPC title
characterised by the number of quantisers and their type and resolution · CPC title
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- What does patent US2025030437A1 cover?
- Disclosed is a circuit including: a loop filter to perform digital processing on a signal inputted from an outside; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on the basis of the signal after the digital processing by the loop filter; and an averaging circuit to calculate the average of the values shown by the signals outputted by the qu…
- Who is the assignee on this patent?
- Mitsubishi Electric Corp
- What technology area does this patent fall under?
- Primary CPC classification H03M3/352. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Jan 23 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).