Electronic device

Patent metadata

Field	Value
Publication number	US-2025029951-A1
Application number	US-202318223528-A
Country	US
Kind code	A1
Filing date	Jul 18, 2023
Priority date	Jul 18, 2023
Publication date	Jan 23, 2025
Grant date	—

Abstract

An electronic device is provided. The electronic device includes a first electronic component, a plurality of second electronic components, and a plurality of conductive elements. The plurality of second electronic components are disposed under the first electronic component. The plurality of conductive elements electrically connect the first electronic component to the plurality of second electronic components. The plurality of conductive elements are free from vertically overlapping the plurality of second electronic components.

First claim

What is claimed is:

1 . An electronic device, comprising:
a first electronic component; a plurality of second electronic components disposed under the first electronic component; and a plurality of conductive elements electrically connecting the first electronic component to the plurality of second electronic components, wherein the plurality of conductive elements are free from vertically overlapping the plurality of second electronic components.

2 . The electronic device of claim 1 , further comprising:
an encapsulant encapsulating a lateral surface of the first electronic component.

3 . The electronic device of claim 2 , wherein the encapsulant encapsulates the plurality of second electronic components and the plurality of conductive elements.

4 . The electronic device of claim 3 , wherein at least one of the plurality of second electronic components has a passive surface facing the first electronic component and an active surface opposite to the passive surface, and the encapsulant covers the active surface.

5 . The electronic device of claim 1 , wherein the first electronic component comprises a through via configured to connect a component disposed over the first electronic component.

6 . The electronic device of claim 5 , further comprising:
a shielding layer, wherein the component comprises an integrated circuit, and the shielding layer is disposed between the first electronic component and the integrated circuit to block electromagnetic interference.

7 . The electronic device of claim 5 , further comprising:
a conductive layer, wherein the component comprises an antenna disposed between the first electronic component and the antenna to serve as a reference ground of the antenna.

8 . The electronic device of claim 5 , wherein the through via overlaps at least one of the plurality of second electronic components.

9 . The electronic device of claim 1 , further comprising:
a redistribution structure disposed under the plurality of second electronic components, wherein the plurality of conductive elements are electrically connected to the plurality of second electronic components by the redistribution structure.

10 . The electronic device of claim 1 , further comprising:
a heat dissipating element disposed over the first electronic component.

11 . An electronic device, comprising:
a first electronic component; a plurality of second electronic components disposed under the first electronic component; and a first circuit layer disposed under the plurality of second electronic components, wherein the first electronic component is electronically connected to the plurality of second electronic components by the first circuit layer.

12 . The electronic device of claim 11 , wherein the plurality of second electronic components do not vertically overlap each other.

13 . The electronic device of claim 11 , further comprising:
an encapsulant encapsulating the plurality of second electronic components; and a conductive element penetrating the encapsulant and electrically connecting the first circuit layer and the first electronic component.

14 . The electronic device of claim 13 , wherein an upper surface of the encapsulant is substantially aligned with a passive surface of the first electronic component.

15 . The electronic device of claim 11 , further comprising:
a shielding layer covering the first electronic component and exposing a portion of an upper surface of the first electronic component.

16 . The electronic device of claim 15 , wherein the first electronic component comprises a first conductive via electrically connected to the shielding layer and a second conducive via exposed by the upper surface of the first electronic component.

17 . The electronic device of claim 16 , wherein the shielding layer covers a lateral surface of the first electronic component.

18 . An electronic device, comprising:
a first electronic component; and a second electronic component disposed under the first electronic component and spaced apart from the first electronic component by an adhesive layer, wherein the electronic device provides an electrical path passing through the first electronic component and the second electronic component without passing through the adhesive layer.

19 . The electronic device of claim 18 , further comprising:
a plurality of conductive elements disposed under the first electronic component and adjacent to the second electronic component, wherein the electrical path passes through at least one of the plurality of conductive elements; and a conductive layer extending from a lower surface of the second electronic component to a lower surface of the at least one of the plurality of conductive elements.

20 . The electronic device of claim 19 , further comprising:
an encapsulant covering the second electronic component and disposed between the conductive layer and the second electronic component, wherein the encapsulant contacts the adhesive layer.

Assignees

• Advanced Semiconductor Eng

Inventors

• Essig Kay Stefan
• Yen You-Lung
• Appelt Bernd Karl

Classifications

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/728

  between a chip and a stacked discrete passive device, e.g. resistors, capacitors or inductors · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title