Method and configuration for stacking multiple printed circuit boards

Patent metadata

Field	Value
Publication number	US-2025024606-A1
Application number	US-202418904428-A
Country	US
Kind code	A1
Filing date	Oct 2, 2024
Priority date	Aug 4, 2022
Publication date	Jan 16, 2025
Grant date	—

Abstract

Electronic devices, electronic modules, and methods for manufacturing electronic devices and/or electronic modules are described herein. In some embodiments, the present invention may be directed to an electronic module that includes a pair of printed circuit boards (PCBs) and a capacitor positioned between the PCBs. Each of the PCBs may include a pair of vias configured to provide electrical connections through the PCB, and the capacitor may include a pair of pins. Each pin of the capacitor may be aligned with a via of one of the PCBs and a corresponding via of the other PCB such that each pin is configured to provide electrical connection between the two PCBs. Additionally, the pair of pins may be configured to support the PCBs with respect to each other.

First claim

What is claimed is:

1 . An electronic module, comprising:
a first printed circuit board (PCB) comprising a first pair of vias configured to provide electrical connections through the first PCB; a second PCB comprising a second pair of vias configured to provide electrical connections through the second PCB; and a capacitor positioned between the first PCB and the second PCB, wherein the capacitor comprises a pair of pins, wherein each pin is aligned with a via of the first pair of vias and a corresponding via of the second pair of vias such that each pin is configured to provide electrical connection between the first PCB and the second PCB, and wherein the pair of pins is configured to support the first PCB with respect to the second PCB.

2 . The electronic module of claim 1 , further comprising one or more electronic components on a distal side of the first PCB with respect to the capacitor, wherein the one or more electronic components is configured to be electrically connected to each via of the first pair of vias.

3 . The electronic module of claim 1 , comprising one or more electronic components on a distal side of the second PCB with respect to the capacitor, wherein the one or more electronic components is configured to be electrically connected to each via of the second pair of vias.

4 . The electronic module of claim 1 , wherein:
the first PCB comprises a first pair of pads, wherein each pad of the first pair of pads is configured to electrically connect the first pair of vias to the pair of pins; and the second PCB comprises a second pair of pads, wherein each pad of the second pair of pads is configured to electrically connect the second pair of vias to the pair of pins.

5 . The electronic module of claim 1 , wherein each pin of the pair of pins comprises:
a first surface affixed to the first PCB; and a second surface affixed to the second PCB.

6 . The electronic module of claim 1 , wherein the pair of pins of the capacitor form a current bridge between the first PCB and the second PCB.

7 . The electronic module of claim 1 , wherein the capacitor comprises a dielectric material disposed between the pair of pins.

8 . The electronic module of claim 1 , wherein the second pair of vias of the second PCB is configured to provide electrical connection between the second PCB and a system PCB.

9 . The electronic module of claim 1 , further comprising a frame assembly, wherein the frame assembly is configured to:
provide electrical connection between the pair of pins of the capacitor and (1) the first PCB using the first pair of vias and (2) the second PCB using the second pair of vias; and support the first PCB with respect to the second PCB.

10 . The electronic module of claim 1 , wherein the capacitor is a first capacitor, and wherein the electronic module further comprises:
a third PCB having a first side and a second side; a second capacitor positioned between the first PCB and the second PCB; a third capacitor and a fourth capacitor positioned between the second PCB and the first side of the third PCB; and a fifth capacitor and a sixth capacitor positioned on the second side of the third PCB.

11 . A method of manufacturing an electronic device, the method comprising:
providing a first printed circuit board (PCB) comprising a first pair of vias configured to provide electrical connections through the first PCB; providing a second PCB comprising a second pair of vias configured to provide electrical connections through the second PCB; positioning a capacitor comprising a pair of pins between the first PCB and the second PCB such that each pin, of the pair of pins, is electrically aligned with a via of the first pair of vias and a corresponding via of the second pair of vias; and securing each pin, of the pair of pins, to the first PCB and the second PCB; wherein the pair of pins is configured to (1) support the first PCB with respect to the second PCB and (2) form a current bridge between the first PCB and the second PCB.

12 . The method of claim 11 , comprising:
forming the first pair of vias in the first PCB; and forming the second pair of vias in the second PCB.

13 . The method of claim 11 , comprising positioning and securing one or more electronic components on a distal side of the first PCB with respect to the capacitor such that the one or more electronic components is electrically connected to each via of the first pair of vias.

14 . The method of claim 11 , comprising:
before securing each pin to the first PCB, forming a first pair of pads on the first PCB, wherein each pad of the first pair of pads is configured to electrically connect to a via of the first pair of vias; and before securing each pin to the second PCB, forming a second pair of pads on the second PCB, wherein each pad of the second pair of pads is configured to electrically connect to a via of the second pair of vias; wherein securing each pin to the first PCB comprises securing each pin, of the pair of pins, to a pad of the first pair of pads, and wherein securing each pin to the second PCB comprises securing each pin, of the pair of pins, to a pad of the second pair of pads.

15 . The method of claim 11 , comprising:
positioning the second PCB such that a first via of the second pair of vias is aligned with an input pad of a system board and a second via of the second pair of vias is aligned with an output pad of the system board; and securing the second PCB to the system board.

16 . The method of claim 11 , comprising:
before positioning the capacitor, positioning a frame assembly on the capacitor, wherein the frame assembly is configured to:
provide electrical connection between the pair of pins of the capacitor and (1) the first PCB using the first pair of vias and (2) the second PCB using the second pair of vias; and
support the first PCB with respect to the second PCB.

17 . An electronic module, comprising:
a first printed circuit board (PCB) comprising a first pair of vias configured to provide electrical connections through the first PCB; a second PCB comprising a second pair of vias configured to provide electrical connections through the second PCB; a capacitor assembly configured to form a current bridge between the first PCB and the second PCB; and a frame assembly at least partially housing the capacitor assembly and positioned between the first PCB and the second PCB, wherein the frame assembly is configured to provide electrical connection between the capacitor assembly and (1) the first PCB using the first pair of vias and (2) the second PCB using the second pair of vias, and wherein the frame assembly is configured to support the first PCB with respect to the second PCB.

18 . The electronic module of claim 17 , wherein the capacitor assembly comprises a capacitor, wherein the capacitor comprises a dielectric material disposed between a pair of pins, and wherein each pin, of the pair of pins, is aligned with a via of the first pair of vias and a corresponding via of the second pair of vias.

19 . The electronic module of claim 17 , wherein the capacitor assembly comprises a first capacitor and a second capacitor, wherein the first capacitor comprises a first dielectric material disposed between a first pair of pins, wherein the second capacitor comprises a second dielectric material disposed between a second pair of pins, and wherein the first pair of pins and the second pair of pins form a current bridge between the first PCB and the second PCB.

Assignees

• Mellanox Technologies Ltd

Inventors

• Yang Xiuzhuang
• Chen Huiying
• He Weibin
• Wu Di

Classifications

• H05K2201/10015

  Non-printed capacitor · CPC title

• H05K2201/1053

  Mounted components directly electrically connected to each other, i.e. not via the PCB · CPC title

• H05K2201/10515

  Stacked components · CPC title

• H05K2201/10606

  Permanent holder for component or auxiliary printed circuits mounted on a printed circuit board [PCB] · CPC title

• H05K2201/09672

  Superposed layout, i.e. in different planes · CPC title