Methods for depositing dielectric films with increased stability

US2024332005A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024332005-A1
Application numberUS-202318192563-A
CountryUS
Kind codeA1
Filing dateMar 29, 2023
Priority dateMar 29, 2023
Publication dateOct 3, 2024
Grant date

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Abstract

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Embodiments include semiconductor processing methods to form dielectric films on semiconductor substrates are described. The methods may include providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The methods may include providing an inert precursor to the processing region of the semiconductor processing chamber. The methods may include generating plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor. The methods may include depositing a silicon-containing material on the substrate.

First claim

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1 . A semiconductor processing method comprising: providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region; providing an inert precursor to the processing region of the semiconductor processing chamber; generating plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor; and depositing a silicon-containing material on the substrate. 2 . The semiconductor processing method of claim 1 , wherein the silicon-containing precursor comprises trimethylsilane (TMS). 3 . The semiconductor processing method of claim 1 , wherein the nitrogen-containing precursor comprises ammonia (NH 3 ). 4 . The semiconductor processing method of claim 1 , wherein the inert precursor comprises argon. 5 . The semiconductor processing method of claim 1 , wherein a flow rate ratio of the inert precursor compared to the silicon-containing precursor is greater than or about 3:1. 6 . The semiconductor processing method of claim 1 , wherein the plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor are generated at a plasma power of greater than or about 250 W. 7 . The semiconductor processing method of claim 1 , wherein the silicon-containing material is characterized by a carbon content of greater than or about 20 at. %. 8 . The semiconductor processing method of claim 1 , further comprising: subsequent to the depositing the silicon-containing material, performing a post-deposition plasma treatment on the silicon-containing material. 9 . The semiconductor processing method of claim 8 , further comprising: halting a flow of the silicon-containing precursor prior to performing the post-deposition plasma treatment on the silicon-containing material. 10 . The semiconductor processing method of claim 3 , further comprising: bonding the silicon-containing material on the substrate to an exposed silicon-and-carbon-containing material on a second substrate. 11 . A semiconductor processing method comprising: providing a silicon-containing precursor, a nitrogen-containing precursor, and argon to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region; generating plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and argon; and depositing a silicon-containing material on the substrate, wherein the silicon-containing material is deposited at a rate of less than or about 5,000 Å/min. 12 . The semiconductor processing method of claim 11 , wherein a flow rate of argon is greater than or about 1,000 sccm. 13 . The semiconductor processing method of claim 11 , wherein a temperature within the semiconductor processing chamber is maintained at less than or about 300° C. 14 . The semiconductor processing method of claim 11 , wherein a pressure within the semiconductor processing chamber is maintained at less than or about 10 Torr. 15 . The semiconductor processing method of claim 11 , wherein the silicon-containing material is characterized by an oxygen content of less than or about 2.0 at. %. 16 . The semiconductor processing method of claim 15 , wherein, subsequent a period of aging, the oxygen content in the silicon-containing material does not increase above about 3.0 at. %. 17 . The semiconductor processing method of claim 11 , wherein the silicon-containing material is characterized by a Young's modulus of greater than or about 30 GPa, a hardness greater than or about 5 GPa, or both. 18 . A semiconductor processing method comprising: providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region, and wherein the silicon-containing precursor, the nitrogen-containing precursor, or both comprise carbon; providing an inert precursor to the processing region of the semiconductor processing chamber; generating plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor; depositing a silicon-containing material on the substrate, wherein the silicon-containing material is characterized by a carbon content of greater than or about 20 at. %; halting a flow rate of the silicon-containing precursor; and performing a post-deposition plasma treatment on the silicon-containing material. 19 . The semiconductor processing method of claim 18 , wherein the post-deposition plasma treatment reduces the carbon content at an exposed surface of the silicon-containing material. 20 . The semiconductor processing method of claim 18 , wherein a plasma power during the post-deposition plasma treatment is maintained at less than or about 1,500 W.

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Classifications

  • being a silicon carbide or silicon carbonitride and not containing oxygen, e.g. SiC or SiC:H · CPC title

  • by exposure to a plasma · CPC title

  • the compound being a silane, e.g. disilane, methylsilane or chlorosilane · CPC title

  • in the presence of a plasma [PECVD] · CPC title

  • Electricity · mapped topic

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What does patent US2024332005A1 cover?
Embodiments include semiconductor processing methods to form dielectric films on semiconductor substrates are described. The methods may include providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The methods may include providing an inert precursor to…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10P14/6905. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 03 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).