Pre-bonding automatic optical inspection defect classification

US2024331131A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2024331131-A1
Application numberUS-202318128491-A
CountryUS
Kind codeA1
Filing dateMar 30, 2023
Priority dateMar 30, 2023
Publication dateOct 3, 2024
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method, apparatus and system for the automatic detection and measurement of chipping defects on diced wafers includes receiving an image of at least a portion of a diced wafer, aligning the received image of the at least the portion of the diced wafer, determining edges of the at least the portion of the diced wafer depicted in the aligned, received image, automatically determining at least one baseline from which to measure chipping defects on the at least the portion of the diced wafer from the determined edges, and measuring chipping defects on the at least the portion of the diced wafer using at least one determined, respective baseline. In some embodiments, the method, apparatus and system can further include applying a machine learning model to measured chipping defects to determine if a critical failure exists on the diced wafer.

First claim

Opening claim text (preview).

1 . A method for the automatic detection and measurement of chipping defects on diced wafers, comprising: receiving an image of at least a portion of a diced wafer; aligning the received image of the at least the portion of the diced wafer; determining edges of the at least the portion of the diced wafer depicted in the aligned, received image; automatically determining at least one baseline from which to measure chipping defects on the at least the portion of the diced wafer from the determined edges; and measuring chipping defects on the at least the portion of the diced wafer using at least one determined, respective baseline. 2 . The method of claim 1 , further comprising: aligning the received image along a vertical axis. 3 . The method of claim 1 , further comprising: aligning the received image along a horizontal axis. 4 . The method of claim 1 , further comprising: determining a reference axis line; and aligning the received image along the determined, reference axis line. 5 . The method of claim 1 , further comprising: measuring chipping defects as a distance from the determined respective baseline to an end of a chipping defect. 6 . The method of claim 1 , further comprising: applying a machine learning model to measured chipping defects to determine if a critical failure exists on the diced wafer. 7 . The method of claim 6 wherein the machine learning model is trained to recognize measured chipping defects that result in a critical failure of the diced wafer. 8 . An apparatus for the automatic detection and measurement of chipping defects on diced wafers, comprising: a processor; and a memory coupled to the processor, the memory having stored therein at least one of programs or instructions executable by the processor to configure the apparatus to: receive an image of at least a portion of a diced wafer; align the received image of the at least the portion of the diced wafer; determine edges of the at least the portion of the diced wafer depicted in the aligned, received image; automatically determine at least one baseline from which to measure chipping defects on the at least the portion of the diced wafer from the determined edges; and measure chipping defects on the at least the portion of the diced wafer using the at least one determined baseline. 9 . The apparatus of claim 8 , wherein the received image is aligned along a vertical axis. 10 . The apparatus of claim 8 wherein the received image is aligned along a horizontal axis. 11 . The apparatus of claim 8 , wherein the apparatus is further configured to: determine a reference axis line; and align the received image along the determined, reference axis line. 12 . The apparatus of claim 8 , wherein chipping defects are measured as a distance from the determined respective baseline to an end of a chipping defect. 13 . The apparatus of claim 8 , wherein the apparatus is further configure to: apply a machine learning model to measured chipping defects to determine if a critical failure exists on the diced wafer. 14 . The apparatus of claim 13 , wherein the machine learning model is trained to recognize measured chipping defects that result in a critical failure of the diced wafer. 15 . A system for the automatic detection and measurement of chipping defects on diced wafers, comprising: an image capture device for capturing images of at least a portion of a diced wafer; and an apparatus comprising: a processor; and a memory having stored therein at least one program, the at least one program including instructions which, when executed by the processor, cause the system to perform a method, comprising; capturing an image of at least a portion of a diced wafer; aligning the captured image of the at least the portion of the diced wafer; determining edges of the at least the portion of the diced wafer depicted in the aligned, received image; automatically determining at least one baseline from which to measure chipping defects on the at least the portion of the diced wafer from the determined edges; and measuring chipping defects on the at least the portion of the diced wafer using at least one determined, respective baseline. 16 . The system of claim 15 , wherein the method further comprises: aligning captured images along at least one of a vertical axis or a horizontal axis. 17 . The system of claim 15 , wherein the method further comprises: determining a reference axis line; and aligning the captured images along the determined, reference axis line. 18 . The system of claim 15 , wherein the method further comprises: Measuring chipping defects as a distance from the determined respective baseline to an end of a chipping defect. 19 . The system of claim 15 , wherein the method further comprises: applying a machine learning model to measured chipping defects to determine if a critical failure exists on the diced wafer. 20 . The system of claim 19 , wherein the machine learning model is trained to recognize measured chipping defects that result in a critical failure of the diced wafer.

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2024331131A1 cover?
A method, apparatus and system for the automatic detection and measurement of chipping defects on diced wafers includes receiving an image of at least a portion of a diced wafer, aligning the received image of the at least the portion of the diced wafer, determining edges of the at least the portion of the diced wafer depicted in the aligned, received image, automatically determining at least o…
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification G06T7/001. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Oct 03 2024 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).